tor-browser

The Tor Browser
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commit 7cf2d8c07945c3a00a8a750edb80dab0829584d7
parent f48d83b15cd232b087d0ef5b35af65dbe3593659
Author: André Bargull <andre.bargull@gmail.com>
Date:   Thu, 23 Oct 2025 11:39:52 +0000

Bug 1995594 - Part 2: Rename register names to match N64. r=spidermonkey-reviewers,jandem

`ta{0..3}` are defined as aliases for `a{4..7}` in the N64 ABI, so we could
keep these aliases if we want to.

Differential Revision: https://phabricator.services.mozilla.com/D269434

Diffstat:
Mjs/src/jit/mips-shared/Architecture-mips-shared.h | 6+++---
Mjs/src/jit/mips-shared/Assembler-mips-shared.h | 12++++--------
Mjs/src/jit/mips64/Assembler-mips64.h | 2+-
3 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/js/src/jit/mips-shared/Architecture-mips-shared.h b/js/src/jit/mips-shared/Architecture-mips-shared.h @@ -140,9 +140,9 @@ class Registers { static const SetType VolatileMask = (1 << Registers::v0) | (1 << Registers::v1) | (1 << Registers::a0) | (1 << Registers::a1) | (1 << Registers::a2) | (1 << Registers::a3) | - (1 << Registers::t0) | (1 << Registers::t1) | (1 << Registers::t2) | - (1 << Registers::t3) | (1 << Registers::ta0) | (1 << Registers::ta1) | - (1 << Registers::ta2) | (1 << Registers::ta3) | (1 << Registers::t8) | + (1 << Registers::a4) | (1 << Registers::a5) | (1 << Registers::a6) | + (1 << Registers::a7) | (1 << Registers::t0) | (1 << Registers::t1) | + (1 << Registers::t2) | (1 << Registers::t3) | (1 << Registers::t8) | (1 << Registers::t9); // We use this constant to save registers when entering functions. This diff --git a/js/src/jit/mips-shared/Assembler-mips-shared.h b/js/src/jit/mips-shared/Assembler-mips-shared.h @@ -30,18 +30,14 @@ static constexpr Register a0{Registers::a0}; static constexpr Register a1{Registers::a1}; static constexpr Register a2{Registers::a2}; static constexpr Register a3{Registers::a3}; -static constexpr Register a4{Registers::ta0}; -static constexpr Register a5{Registers::ta1}; -static constexpr Register a6{Registers::ta2}; -static constexpr Register a7{Registers::ta3}; +static constexpr Register a4{Registers::a4}; +static constexpr Register a5{Registers::a5}; +static constexpr Register a6{Registers::a6}; +static constexpr Register a7{Registers::a7}; static constexpr Register t0{Registers::t0}; static constexpr Register t1{Registers::t1}; static constexpr Register t2{Registers::t2}; static constexpr Register t3{Registers::t3}; -static constexpr Register t4{Registers::ta0}; -static constexpr Register t5{Registers::ta1}; -static constexpr Register t6{Registers::ta2}; -static constexpr Register t7{Registers::ta3}; static constexpr Register s0{Registers::s0}; static constexpr Register s1{Registers::s1}; static constexpr Register s2{Registers::s2}; diff --git a/js/src/jit/mips64/Assembler-mips64.h b/js/src/jit/mips64/Assembler-mips64.h @@ -84,7 +84,7 @@ static constexpr Register WasmTailCallFPScratchReg = ABINonArgReg3; // It must be a volatile register. static constexpr Register WasmJitEntryReturnScratch = t1; -static constexpr Register InterpreterPCReg = t5; +static constexpr Register InterpreterPCReg = a5; static constexpr Register JSReturnReg = v1; static constexpr Register JSReturnReg_Type = JSReturnReg;