Assembler-mips64.h (11480B)
1 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- 2 * vim: set ts=8 sts=2 et sw=2 tw=80: 3 * This Source Code Form is subject to the terms of the Mozilla Public 4 * License, v. 2.0. If a copy of the MPL was not distributed with this 5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ 6 7 #ifndef jit_mips64_Assembler_mips64_h 8 #define jit_mips64_Assembler_mips64_h 9 10 #include "jit/mips-shared/Assembler-mips-shared.h" 11 12 #include "jit/mips64/Architecture-mips64.h" 13 14 namespace js { 15 namespace jit { 16 17 static constexpr Register CallTempReg4 = a4; 18 static constexpr Register CallTempReg5 = a5; 19 20 static constexpr Register CallTempNonArgRegs[] = {t4, t5, t6, t7}; 21 static const uint32_t NumCallTempNonArgRegs = std::size(CallTempNonArgRegs); 22 23 class ABIArgGenerator : public ABIArgGeneratorShared { 24 unsigned regIndex_; 25 ABIArg current_; 26 27 public: 28 explicit ABIArgGenerator(ABIKind kind) 29 : ABIArgGeneratorShared(kind), regIndex_(0) {} 30 31 ABIArg next(MIRType argType); 32 ABIArg& current() { return current_; } 33 }; 34 35 // See "ABI special registers" in Assembler-shared.h for more information. 36 static constexpr Register ABINonArgReg0 = t4; 37 static constexpr Register ABINonArgReg1 = t5; 38 static constexpr Register ABINonArgReg2 = t6; 39 static constexpr Register ABINonArgReg3 = t7; 40 41 // See "ABI special registers" in Assembler-shared.h for more information. 42 // Avoid f23 which is the ScratchDoubleReg. 43 static constexpr FloatRegister ABINonArgDoubleReg{FloatRegisters::f21, 44 FloatRegisters::Double}; 45 46 // See "ABI special registers" in Assembler-shared.h for more information. 47 static constexpr Register ABINonArgReturnReg0 = t4; 48 static constexpr Register ABINonArgReturnReg1 = t5; 49 static constexpr Register ABINonVolatileReg = s0; 50 51 // See "ABI special registers" in Assembler-shared.h for more information. 52 static constexpr Register ABINonArgReturnVolatileReg = t4; 53 54 // See "ABI special registers" in Assembler-shared.h, and "The WASM ABIs" in 55 // WasmFrame.h for more information. 56 static constexpr Register InstanceReg = s5; 57 58 // Registers used for wasm table calls. These registers must be disjoint 59 // from the ABI argument registers, InstanceReg and each other. 60 static constexpr Register WasmTableCallScratchReg0 = ABINonArgReg0; 61 static constexpr Register WasmTableCallScratchReg1 = ABINonArgReg1; 62 static constexpr Register WasmTableCallSigReg = ABINonArgReg2; 63 static constexpr Register WasmTableCallIndexReg = ABINonArgReg3; 64 65 // Registers used for ref calls. 66 static constexpr Register WasmCallRefCallScratchReg0 = ABINonArgReg0; 67 static constexpr Register WasmCallRefCallScratchReg1 = ABINonArgReg1; 68 static constexpr Register WasmCallRefCallScratchReg2 = ABINonArgReg2; 69 static constexpr Register WasmCallRefReg = ABINonArgReg3; 70 71 // Registers used for wasm tail calls operations. 72 static constexpr Register WasmTailCallInstanceScratchReg = ABINonArgReg1; 73 static constexpr Register WasmTailCallRAScratchReg = ra; 74 static constexpr Register WasmTailCallFPScratchReg = ABINonArgReg3; 75 76 // Register used as a scratch along the return path in the fast js -> wasm stub 77 // code. This must not overlap ReturnReg, JSReturnOperand, or InstanceReg. 78 // It must be a volatile register. 79 static constexpr Register WasmJitEntryReturnScratch = t5; 80 81 static constexpr Register InterpreterPCReg = a5; 82 83 static constexpr Register JSReturnReg = v1; 84 static constexpr Register JSReturnReg_Type = JSReturnReg; 85 static constexpr Register JSReturnReg_Data = JSReturnReg; 86 static constexpr Register64 ReturnReg64(ReturnReg); 87 static constexpr FloatRegister ReturnFloat32Reg{FloatRegisters::f0, 88 FloatRegisters::Single}; 89 static constexpr FloatRegister ReturnDoubleReg{FloatRegisters::f0, 90 FloatRegisters::Double}; 91 static constexpr FloatRegister ScratchFloat32Reg{FloatRegisters::f23, 92 FloatRegisters::Single}; 93 static constexpr FloatRegister ScratchDoubleReg{FloatRegisters::f23, 94 FloatRegisters::Double}; 95 96 struct ScratchFloat32Scope : public AutoFloatRegisterScope { 97 explicit ScratchFloat32Scope(MacroAssembler& masm) 98 : AutoFloatRegisterScope(masm, ScratchFloat32Reg) {} 99 }; 100 101 struct ScratchDoubleScope : public AutoFloatRegisterScope { 102 explicit ScratchDoubleScope(MacroAssembler& masm) 103 : AutoFloatRegisterScope(masm, ScratchDoubleReg) {} 104 }; 105 106 static constexpr FloatRegister f0{FloatRegisters::f0, FloatRegisters::Double}; 107 static constexpr FloatRegister f1{FloatRegisters::f1, FloatRegisters::Double}; 108 static constexpr FloatRegister f2{FloatRegisters::f2, FloatRegisters::Double}; 109 static constexpr FloatRegister f3{FloatRegisters::f3, FloatRegisters::Double}; 110 static constexpr FloatRegister f4{FloatRegisters::f4, FloatRegisters::Double}; 111 static constexpr FloatRegister f5{FloatRegisters::f5, FloatRegisters::Double}; 112 static constexpr FloatRegister f6{FloatRegisters::f6, FloatRegisters::Double}; 113 static constexpr FloatRegister f7{FloatRegisters::f7, FloatRegisters::Double}; 114 static constexpr FloatRegister f8{FloatRegisters::f8, FloatRegisters::Double}; 115 static constexpr FloatRegister f9{FloatRegisters::f9, FloatRegisters::Double}; 116 static constexpr FloatRegister f10{FloatRegisters::f10, FloatRegisters::Double}; 117 static constexpr FloatRegister f11{FloatRegisters::f11, FloatRegisters::Double}; 118 static constexpr FloatRegister f12{FloatRegisters::f12, FloatRegisters::Double}; 119 static constexpr FloatRegister f13{FloatRegisters::f13, FloatRegisters::Double}; 120 static constexpr FloatRegister f14{FloatRegisters::f14, FloatRegisters::Double}; 121 static constexpr FloatRegister f15{FloatRegisters::f15, FloatRegisters::Double}; 122 static constexpr FloatRegister f16{FloatRegisters::f16, FloatRegisters::Double}; 123 static constexpr FloatRegister f17{FloatRegisters::f17, FloatRegisters::Double}; 124 static constexpr FloatRegister f18{FloatRegisters::f18, FloatRegisters::Double}; 125 static constexpr FloatRegister f19{FloatRegisters::f19, FloatRegisters::Double}; 126 static constexpr FloatRegister f20{FloatRegisters::f20, FloatRegisters::Double}; 127 static constexpr FloatRegister f21{FloatRegisters::f21, FloatRegisters::Double}; 128 static constexpr FloatRegister f22{FloatRegisters::f22, FloatRegisters::Double}; 129 static constexpr FloatRegister f23{FloatRegisters::f23, FloatRegisters::Double}; 130 static constexpr FloatRegister f24{FloatRegisters::f24, FloatRegisters::Double}; 131 static constexpr FloatRegister f25{FloatRegisters::f25, FloatRegisters::Double}; 132 static constexpr FloatRegister f26{FloatRegisters::f26, FloatRegisters::Double}; 133 static constexpr FloatRegister f27{FloatRegisters::f27, FloatRegisters::Double}; 134 static constexpr FloatRegister f28{FloatRegisters::f28, FloatRegisters::Double}; 135 static constexpr FloatRegister f29{FloatRegisters::f29, FloatRegisters::Double}; 136 static constexpr FloatRegister f30{FloatRegisters::f30, FloatRegisters::Double}; 137 static constexpr FloatRegister f31{FloatRegisters::f31, FloatRegisters::Double}; 138 139 // MIPS64 CPUs can only load multibyte data that is "naturally" 140 // eight-byte-aligned, sp register should be sixteen-byte-aligned. 141 static constexpr uint32_t ABIStackAlignment = 16; 142 static constexpr uint32_t JitStackAlignment = 16; 143 144 static constexpr uint32_t JitStackValueAlignment = 145 JitStackAlignment / sizeof(Value); 146 static_assert(JitStackAlignment % sizeof(Value) == 0 && 147 JitStackValueAlignment >= 1, 148 "Stack alignment should be a non-zero multiple of sizeof(Value)"); 149 150 // TODO this is just a filler to prevent a build failure. The MIPS SIMD 151 // alignment requirements still need to be explored. 152 // TODO Copy the static_asserts from x64/x86 assembler files. 153 static constexpr uint32_t SimdMemoryAlignment = 16; 154 155 static constexpr uint32_t WasmStackAlignment = SimdMemoryAlignment; 156 static const uint32_t WasmTrapInstructionLength = 4; 157 158 // See comments in wasm::GenerateFunctionPrologue. The difference between these 159 // is the size of the largest callable prologue on the platform. 160 static constexpr uint32_t WasmCheckedCallEntryOffset = 0u; 161 162 static constexpr Scale ScalePointer = TimesEight; 163 164 class Assembler : public AssemblerMIPSShared { 165 public: 166 Assembler() : AssemblerMIPSShared() {} 167 168 static uintptr_t GetPointer(uint8_t*); 169 170 using AssemblerMIPSShared::bind; 171 172 static void Bind(uint8_t* rawCode, const CodeLabel& label); 173 174 void processCodeLabels(uint8_t* rawCode); 175 176 static void TraceJumpRelocations(JSTracer* trc, JitCode* code, 177 CompactBufferReader& reader); 178 static void TraceDataRelocations(JSTracer* trc, JitCode* code, 179 CompactBufferReader& reader); 180 181 void bind(InstImm* inst, uintptr_t branch, uintptr_t target); 182 183 // Copy the assembly code to the given buffer, and perform any pending 184 // relocations relying on the target address. 185 void executableCopy(uint8_t* buffer); 186 187 static uint32_t PatchWrite_NearCallSize(); 188 189 static uint64_t ExtractLoad64Value(Instruction* inst0); 190 static void UpdateLoad64Value(Instruction* inst0, uint64_t value); 191 static void WriteLoad64Instructions(Instruction* inst0, Register reg, 192 uint64_t value); 193 194 static void PatchWrite_NearCall(CodeLocationLabel start, 195 CodeLocationLabel toCall); 196 static void PatchDataWithValueCheck(CodeLocationLabel label, ImmPtr newValue, 197 ImmPtr expectedValue); 198 static void PatchDataWithValueCheck(CodeLocationLabel label, 199 PatchedImmPtr newValue, 200 PatchedImmPtr expectedValue); 201 202 static uint64_t ExtractInstructionImmediate(uint8_t* code); 203 204 static void ToggleCall(CodeLocationLabel inst_, bool enabled); 205 }; // Assembler 206 207 static const uint32_t NumIntArgRegs = 8; 208 static const uint32_t NumFloatArgRegs = NumIntArgRegs; 209 210 static inline bool GetIntArgReg(uint32_t usedArgSlots, Register* out) { 211 if (usedArgSlots < NumIntArgRegs) { 212 *out = Register::FromCode(a0.code() + usedArgSlots); 213 return true; 214 } 215 return false; 216 } 217 218 static inline bool GetFloatArgReg(uint32_t usedArgSlots, FloatRegister* out) { 219 if (usedArgSlots < NumFloatArgRegs) { 220 *out = FloatRegister::FromCode(f12.code() + usedArgSlots); 221 return true; 222 } 223 return false; 224 } 225 226 // Get a register in which we plan to put a quantity that will be used as an 227 // integer argument. This differs from GetIntArgReg in that if we have no more 228 // actual argument registers to use we will fall back on using whatever 229 // CallTempReg* don't overlap the argument registers, and only fail once those 230 // run out too. 231 static inline bool GetTempRegForIntArg(uint32_t usedIntArgs, 232 uint32_t usedFloatArgs, Register* out) { 233 // NOTE: We can't properly determine which regs are used if there are 234 // float arguments. If this is needed, we will have to guess. 235 MOZ_ASSERT(usedFloatArgs == 0); 236 237 if (GetIntArgReg(usedIntArgs, out)) { 238 return true; 239 } 240 // Unfortunately, we have to assume things about the point at which 241 // GetIntArgReg returns false, because we need to know how many registers it 242 // can allocate. 243 usedIntArgs -= NumIntArgRegs; 244 if (usedIntArgs >= NumCallTempNonArgRegs) { 245 return false; 246 } 247 *out = CallTempNonArgRegs[usedIntArgs]; 248 return true; 249 } 250 251 } // namespace jit 252 } // namespace js 253 254 #endif /* jit_mips64_Assembler_mips64_h */