tor-browser

commit 704154b7849cdccaaadae7d7f9982108fe7d4812
parent 8baee45cfa696352933ddd3e7cd9dcd07071bbe1
Author: Xuan Chen <henry.chen@oss.cipunited.com>
Date:   Tue, 11 Nov 2025 18:04:47 +0000

Bug 1997517 - Part 3: [mips64] Fix R2 macro instructions for pre-R2. r=anba

Differential Revision: https://phabricator.services.mozilla.com/D271758

Diffstat:
M
js/src/jit/mips-shared/MacroAssembler-mips-shared.cpp
 | 
34
+++++++++++++++++++++++-----------
M
js/src/jit/mips64/MacroAssembler-mips64.cpp
 | 
94
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------

2 files changed, 95 insertions(+), 33 deletions(-)
diff --git a/js/src/jit/mips-shared/MacroAssembler-mips-shared.cpp b/js/src/jit/mips-shared/MacroAssembler-mips-shared.cpp
@@ -119,8 +119,8 @@ void MacroAssemblerMIPSShared::ma_rol(Register rd, Register rt,
   if (hasR2()) {
     as_rotrv(rd, rt, scratch);
   } else {
-    as_srlv(rd, rt, scratch);
-    as_sllv(scratch, rt, shift);
+    as_srlv(scratch, rt, scratch);
+    as_sllv(rd, rt, shift);
     as_or(rd, rd, scratch);
   }
 }
@@ -162,15 +162,27 @@ void MacroAssemblerMIPSShared::ma_ins(Register rt, Register rs, uint16_t pos,
   } else {
     UseScratchRegisterScope temps(*this);
     Register scratch = temps.Acquire();
-    Register scratch2 = temps.Acquire();
-    ma_subu(scratch, zero, Imm32(1));
-    as_srl(scratch, scratch, 32 - size);
-    as_and(scratch2, rs, scratch);
-    as_sll(scratch2, scratch2, pos);
-    as_sll(scratch, scratch, pos);
-    as_nor(scratch, scratch, zero);
-    as_and(scratch, rt, scratch);
-    as_or(rt, scratch2, scratch);
+    if (pos == 0) {
+      ma_ext(scratch, rs, 0, size);
+      as_srl(rt, rt, size);
+      as_sll(rt, rt, size);
+      as_or(rt, rt, scratch);
+    } else if (pos + size == 32) {
+      as_sll(scratch, rs, pos);
+      as_sll(rt, rt, size);
+      as_srl(rt, rt, size);
+      as_or(rt, rt, scratch);
+    } else {
+      Register scratch2 = temps.Acquire();
+      ma_subu(scratch, zero, Imm32(1));
+      as_srl(scratch, scratch, 32 - size);
+      as_and(scratch2, rs, scratch);
+      as_sll(scratch2, scratch2, pos);
+      as_sll(scratch, scratch, pos);
+      as_nor(scratch, scratch, zero);
+      as_and(scratch, rt, scratch);
+      as_or(rt, scratch2, scratch);
+    }
   }
 }
 
diff --git a/js/src/jit/mips64/MacroAssembler-mips64.cpp b/js/src/jit/mips64/MacroAssembler-mips64.cpp
@@ -316,21 +316,23 @@ void MacroAssemblerMIPS64::ma_dsra(Register rd, Register rt, Imm32 shift) {
 }
 
 void MacroAssemblerMIPS64::ma_dror(Register rd, Register rt, Imm32 shift) {
-  if (31 < shift.value) {
-    as_drotr32(rd, rt, shift.value);
+  if (hasR2()) {
+    if (31 < shift.value) {
+      as_drotr32(rd, rt, shift.value);
+    } else {
+      as_drotr(rd, rt, shift.value);
+    }
   } else {
-    as_drotr(rd, rt, shift.value);
+    UseScratchRegisterScope temps(*this);
+    Register scratch = temps.Acquire();
+    ma_dsrl(scratch, rt, shift);
+    ma_dsll(rd, rt, Imm32(64 - shift.value));
+    as_or(rd, rd, scratch);
   }
 }
 
 void MacroAssemblerMIPS64::ma_drol(Register rd, Register rt, Imm32 shift) {
-  uint32_t s = 64 - shift.value;
-
-  if (31 < s) {
-    as_drotr32(rd, rt, s);
-  } else {
-    as_drotr(rd, rt, s);
-  }
+  ma_dror(rd, rt, Imm32(64 - shift.value));
 }
 
 void MacroAssemblerMIPS64::ma_dsll(Register rd, Register rt, Register shift) {
@@ -346,39 +348,87 @@ void MacroAssemblerMIPS64::ma_dsra(Register rd, Register rt, Register shift) {
 }
 
 void MacroAssemblerMIPS64::ma_dror(Register rd, Register rt, Register shift) {
-  as_drotrv(rd, rt, shift);
+  if (hasR2()) {
+    as_drotrv(rd, rt, shift);
+  } else {
+    UseScratchRegisterScope temps(*this);
+    Register scratch = temps.Acquire();
+    as_dsubu(scratch, zero, shift);
+    as_dsllv(scratch, rt, scratch);
+    as_dsrlv(rd, rt, shift);
+    as_or(rd, rd, scratch);
+  }
 }
 
 void MacroAssemblerMIPS64::ma_drol(Register rd, Register rt, Register shift) {
   UseScratchRegisterScope temps(*this);
   Register scratch = temps.Acquire();
   as_dsubu(scratch, zero, shift);
-  as_drotrv(rd, rt, scratch);
+  if (hasR2()) {
+    as_drotrv(rd, rt, scratch);
+  } else {
+    as_dsrlv(scratch, rt, scratch);
+    as_dsllv(rd, rt, shift);
+    as_or(rd, rd, scratch);
+  }
 }
 
 void MacroAssemblerMIPS64::ma_dins(Register rt, Register rs, Imm32 pos,
                                    Imm32 size) {
-  if (pos.value >= 0 && pos.value < 32) {
-    if (pos.value + size.value > 32) {
-      as_dinsm(rt, rs, pos.value, size.value);
+  if (hasR2()) {
+    if (pos.value >= 0 && pos.value < 32) {
+      if (pos.value + size.value > 32) {
+        as_dinsm(rt, rs, pos.value, size.value);
+      } else {
+        as_dins(rt, rs, pos.value, size.value);
+      }
     } else {
-      as_dins(rt, rs, pos.value, size.value);
+      as_dinsu(rt, rs, pos.value, size.value);
     }
   } else {
-    as_dinsu(rt, rs, pos.value, size.value);
+    UseScratchRegisterScope temps(*this);
+    Register scratch = temps.Acquire();
+
+    // optimize for special positions
+    if (pos.value == 0) {
+      ma_dext(scratch, rs, Imm32(0), size);
+      ma_dsrl(rt, rt, size);
+      ma_dsll(rt, rt, size);
+      as_or(rt, rt, scratch);
+    } else if (pos.value + size.value == 64) {
+      ma_dsll(scratch, rs, pos);
+      ma_dsll(rt, rt, size);
+      ma_dsrl(rt, rt, size);
+      as_or(rt, rt, scratch);
+    } else {
+      Register scratch2 = temps.Acquire();
+      ma_dsubu(scratch, zero, Imm32(1));
+      ma_dsrl(scratch, scratch, Imm32(64 - size.value));
+      as_and(scratch2, rs, scratch);
+      ma_dsll(scratch, scratch, pos);
+      ma_dsll(scratch2, scratch2, pos);
+      as_nor(scratch, scratch, zero);
+      as_and(rt, rt, scratch);
+      as_or(rt, rt, scratch2);
+    }
   }
 }
 
 void MacroAssemblerMIPS64::ma_dext(Register rt, Register rs, Imm32 pos,
                                    Imm32 size) {
-  if (pos.value >= 0 && pos.value < 32) {
-    if (size.value > 32) {
-      as_dextm(rt, rs, pos.value, size.value);
+  if (hasR2()) {
+    if (pos.value >= 0 && pos.value < 32) {
+      if (size.value > 32) {
+        as_dextm(rt, rs, pos.value, size.value);
+      } else {
+        as_dext(rt, rs, pos.value, size.value);
+      }
     } else {
-      as_dext(rt, rs, pos.value, size.value);
+      as_dextu(rt, rs, pos.value, size.value);
     }
   } else {
-    as_dextu(rt, rs, pos.value, size.value);
+    ma_dsll(rt, rs, Imm32(64 - pos.value - size.value));
+    ma_dsrl(rt, rt, Imm32(64 - size.value));
   }
 }