tor-browser

commit 0b4dad14e7fc31ec228204e2d1875e3f98726113
parent 8b0fe0242404df25797bbd36fadbcf8e91910b4b
Author: André Bargull <andre.bargull@gmail.com>
Date:   Thu, 23 Oct 2025 10:12:59 +0000

Bug 1995569: Remove unnecessary And instruction for LUrshD on arm64. r=spidermonkey-reviewers,iain

And perform some minor code clean-ups:
- Drop `const` for local variables, because it just clutter in such a short method.
- Don't call `ToRegister` repeatedly, but instead use `asUnsized`, because that's
  faster and generates less code.

Differential Revision: https://phabricator.services.mozilla.com/D269414

Diffstat:
M
js/src/jit/arm64/CodeGenerator-arm64.cpp
 | 
19
++++++++-----------

1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/js/src/jit/arm64/CodeGenerator-arm64.cpp b/js/src/jit/arm64/CodeGenerator-arm64.cpp
@@ -964,25 +964,22 @@ void CodeGenerator::visitShiftIntPtr(LShiftIntPtr* ins) {
 }
 
 void CodeGenerator::visitUrshD(LUrshD* ins) {
-  const ARMRegister lhs = toWRegister(ins->lhs());
+  ARMRegister lhs = toWRegister(ins->lhs());
   const LAllocation* rhs = ins->rhs();
-  const FloatRegister out = ToFloatRegister(ins->output());
-
-  const Register temp = ToRegister(ins->temp0());
-  const ARMRegister temp32 = toWRegister(ins->temp0());
+  FloatRegister out = ToFloatRegister(ins->output());
+  ARMRegister temp = toWRegister(ins->temp0());
 
   if (rhs->isConstant()) {
     int32_t shift = ToInt32(rhs) & 0x1F;
     if (shift) {
-      masm.Lsr(temp32, lhs, shift);
-      masm.convertUInt32ToDouble(temp, out);
+      masm.Lsr(temp, lhs, shift);
+      masm.convertUInt32ToDouble(temp.asUnsized(), out);
     } else {
-      masm.convertUInt32ToDouble(ToRegister(ins->lhs()), out);
+      masm.convertUInt32ToDouble(lhs.asUnsized(), out);
     }
   } else {
-    masm.And(temp32, toWRegister(rhs), Operand(0x1F));
-    masm.Lsr(temp32, lhs, temp32);
-    masm.convertUInt32ToDouble(temp, out);
+    masm.Lsr(temp, lhs, toWRegister(rhs));
+    masm.convertUInt32ToDouble(temp.asUnsized(), out);
   }
 }