commit 00386ce9150a46471be616262c2f06deaeb1d818
parent 88571c466f03f1a9e5418df63d9590d1bb10fce9
Author: Rong "Mantle" Bao <webmaster@csmantle.top>
Date: Fri, 12 Dec 2025 14:17:57 +0000
Bug 2004879 - [riscv64] Part 1: Rename jump chain related helpers to camelCase. r=jandem
Differential Revision: https://phabricator.services.mozilla.com/D275567
Diffstat:
6 files changed, 99 insertions(+), 93 deletions(-)
diff --git a/js/src/jit/riscv64/Assembler-riscv64.cpp b/js/src/jit/riscv64/Assembler-riscv64.cpp
@@ -554,9 +554,9 @@ int Assembler::disassembleInstr(Instr instr, bool enable_spew) {
return size;
}
-uint64_t Assembler::target_address_at(Instruction* pc) {
+uint64_t Assembler::jumpChainTargetAddressAt(Instruction* pc) {
Instruction* instr0 = pc;
- DEBUG_PRINTF("target_address_at: pc: 0x%p\t", instr0);
+ DEBUG_PRINTF("jumpChainTargetAddressAt: pc: 0x%p\t", instr0);
Instruction* instr1 = pc + 1 * kInstrSize;
Instruction* instr2 = pc + 2 * kInstrSize;
Instruction* instr3 = pc + 3 * kInstrSize;
@@ -564,7 +564,7 @@ uint64_t Assembler::target_address_at(Instruction* pc) {
Instruction* instr5 = pc + 5 * kInstrSize;
// Interpret instructions for address generated by li: See listing in
- // Assembler::set_target_address_at() just below.
+ // Assembler::jumpChainSetTargetValueAt() just below.
if (IsLui(*reinterpret_cast<Instr*>(instr0)) &&
IsAddi(*reinterpret_cast<Instr*>(instr1)) &&
IsSlli(*reinterpret_cast<Instr*>(instr2)) &&
@@ -675,7 +675,7 @@ uint64_t Assembler::ExtractLoad64Value(Instruction* inst0) {
disassembleInstr(instr7->InstructionBits());
MOZ_ASSERT(IsAddi(*reinterpret_cast<Instr*>(instr1)));
// Li48
- return target_address_at(inst0);
+ return jumpChainTargetAddressAt(inst0);
}
}
@@ -752,12 +752,12 @@ void Assembler::UpdateLoad64Value(Instruction* pc, uint64_t value) {
disassembleInstr(instr6->InstructionBits());
disassembleInstr(instr7->InstructionBits());
MOZ_ASSERT(IsAddi(*reinterpret_cast<Instr*>(instr1)));
- set_target_value_at(pc, value);
+ jumpChainSetTargetValueAt(pc, value);
}
}
-void Assembler::set_target_value_at(Instruction* pc, uint64_t target) {
- DEBUG_PRINTF("\tset_target_value_at: pc: %p\ttarget: %" PRIx64 "\n", pc,
+void Assembler::jumpChainSetTargetValueAt(Instruction* pc, uint64_t target) {
+ DEBUG_PRINTF("\tjumpChainSetTargetValueAt: pc: %p\ttarget: %" PRIx64 "\n", pc,
target);
uint32_t* p = reinterpret_cast<uint32_t*>(pc);
MOZ_ASSERT((target & 0xffff000000000000ll) == 0);
@@ -789,7 +789,7 @@ void Assembler::set_target_value_at(Instruction* pc, uint64_t target) {
*(p + 4) = *(p + 4) | (6 << 20);
*(p + 5) = *(p + 5) & 0xfffff;
*(p + 5) = *(p + 5) | ((int32_t)a6 << 20);
- MOZ_ASSERT(target_address_at(pc) == target);
+ MOZ_ASSERT(jumpChainTargetAddressAt(pc) == target);
}
void Assembler::WriteLoad64Instructions(Instruction* inst0, Register reg,
@@ -860,12 +860,12 @@ void Assembler::PatchWrite_Imm32(CodeLocationLabel label, Imm32 imm) {
*(raw - 1) = imm.value;
}
-bool Assembler::target_at_put(BufferOffset pos, BufferOffset target_pos,
- bool trampoline) {
+bool Assembler::jumpChainPutTargetAt(BufferOffset pos, BufferOffset target_pos,
+ bool trampoline) {
if (m_buffer.oom()) {
return true;
}
- DEBUG_PRINTF("\ttarget_at_put: %p (%d) to %p (%d)\n",
+ DEBUG_PRINTF("\tjumpChainPutTargetAt: %p (%d) to %p (%d)\n",
reinterpret_cast<Instr*>(editSrc(pos)), pos.getOffset(),
reinterpret_cast<Instr*>(editSrc(pos)) + target_pos.getOffset() -
pos.getOffset(),
@@ -890,8 +890,8 @@ bool Assembler::target_at_put(BufferOffset pos, BufferOffset target_pos,
instr_at_put(pos, instr);
} break;
case LUI: {
- set_target_value_at(instruction,
- reinterpret_cast<uintptr_t>(editSrc(target_pos)));
+ jumpChainSetTargetValueAt(
+ instruction, reinterpret_cast<uintptr_t>(editSrc(target_pos)));
} break;
case AUIPC: {
Instr instr_auipc = instr;
@@ -934,7 +934,7 @@ bool Assembler::target_at_put(BufferOffset pos, BufferOffset target_pos,
const int kEndOfChain = -1;
const int32_t kEndOfJumpChain = 0;
-int Assembler::target_at(BufferOffset pos, bool is_internal) {
+int Assembler::jumpChainTargetAt(BufferOffset pos, bool is_internal) {
if (oom()) {
return kEndOfChain;
}
@@ -943,12 +943,12 @@ int Assembler::target_at(BufferOffset pos, bool is_internal) {
if (IsAuipc(instruction->InstructionBits())) {
instruction2 = editSrc(BufferOffset(pos.getOffset() + kInstrSize));
}
- return target_at(instruction, pos, is_internal, instruction2);
+ return jumpChainTargetAt(instruction, pos, is_internal, instruction2);
}
-int Assembler::target_at(Instruction* instruction, BufferOffset pos,
- bool is_internal, Instruction* instruction2) {
- DEBUG_PRINTF("\t target_at: %p(%x)\n\t",
+int Assembler::jumpChainTargetAt(Instruction* instruction, BufferOffset pos,
+ bool is_internal, Instruction* instruction2) {
+ DEBUG_PRINTF("\t jumpChainTargetAt: %p(%x)\n\t",
reinterpret_cast<Instr*>(instruction), pos.getOffset());
disassembleInstr(instruction->InstructionBits());
Instr instr = instruction->InstructionBits();
@@ -959,7 +959,8 @@ int Assembler::target_at(Instruction* instruction, BufferOffset pos,
// EndOfChain sentinel is returned directly, not relative to pc or pos.
return kEndOfChain;
} else {
- DEBUG_PRINTF("\t target_at: %d %d\n", imm13, pos.getOffset() + imm13);
+ DEBUG_PRINTF("\t jumpChainTargetAt: %d %d\n", imm13,
+ pos.getOffset() + imm13);
return pos.getOffset() + imm13;
}
}
@@ -969,7 +970,8 @@ int Assembler::target_at(Instruction* instruction, BufferOffset pos,
// EndOfChain sentinel is returned directly, not relative to pc or pos.
return kEndOfChain;
} else {
- DEBUG_PRINTF("\t target_at: %d %d\n", imm21, pos.getOffset() + imm21);
+ DEBUG_PRINTF("\t jumpChainTargetAt: %d %d\n", imm21,
+ pos.getOffset() + imm21);
return pos.getOffset() + imm21;
}
}
@@ -979,12 +981,13 @@ int Assembler::target_at(Instruction* instruction, BufferOffset pos,
// EndOfChain sentinel is returned directly, not relative to pc or pos.
return kEndOfChain;
} else {
- DEBUG_PRINTF("\t target_at: %d %d\n", imm12, pos.getOffset() + imm12);
+ DEBUG_PRINTF("\t jumpChainTargetAt: %d %d\n", imm12,
+ pos.getOffset() + imm12);
return pos.getOffset() + imm12;
}
}
case LUI: {
- uintptr_t imm = target_address_at(instruction);
+ uintptr_t imm = jumpChainTargetAddressAt(instruction);
uintptr_t instr_address = reinterpret_cast<uintptr_t>(instruction);
if (imm == kEndOfJumpChain) {
return kEndOfChain;
@@ -1002,7 +1005,8 @@ int Assembler::target_at(Instruction* instruction, BufferOffset pos,
MOZ_ASSERT(IsJalr(instr_I) || IsAddi(instr_I));
int32_t offset = BrachlongOffset(instr_auipc, instr_I);
if (offset == kEndOfJumpChain) return kEndOfChain;
- DEBUG_PRINTF("\t target_at: %d %d\n", offset, pos.getOffset() + offset);
+ DEBUG_PRINTF("\t jumpChainTargetAt: %d %d\n", offset,
+ pos.getOffset() + offset);
return offset + pos.getOffset();
}
default: {
@@ -1011,10 +1015,10 @@ int Assembler::target_at(Instruction* instruction, BufferOffset pos,
}
}
-uint32_t Assembler::next_link(Label* L, bool is_internal) {
+uint32_t Assembler::jumpChainNextLink(Label* L, bool is_internal) {
MOZ_ASSERT(L->used());
BufferOffset pos(L);
- int link = target_at(pos, is_internal);
+ int link = jumpChainTargetAt(pos, is_internal);
if (link == kEndOfChain) {
L->reset();
return LabelBase::INVALID_OFFSET;
@@ -1037,7 +1041,7 @@ void Assembler::bind(Label* label, BufferOffset boff) {
do {
// A used label holds a link to branch that uses it.
- // It's okay we use it here since next_link() mutates `label`.
+ // It's okay we use it here since jumpChainNextLink() mutates `label`.
BufferOffset b(label);
DEBUG_PRINTF("\tbind next:%d\n", b.getOffset());
// Even a 0 offset may be invalid if we're out of memory.
@@ -1046,7 +1050,7 @@ void Assembler::bind(Label* label, BufferOffset boff) {
}
int fixup_pos = b.getOffset();
int dist = dest.getOffset() - fixup_pos;
- next = next_link(label, false);
+ next = jumpChainNextLink(label, false);
DEBUG_PRINTF(
"\t%p fixup: %d next: %u dest: %d dist: %d nextOffset: %d "
"currOffset: %d\n",
@@ -1063,7 +1067,7 @@ void Assembler::bind(Label* label, BufferOffset boff) {
IsJalr(editSrc(BufferOffset(next + 4))->InstructionBits()));
DEBUG_PRINTF("\t\ttrampolining: %d\n", next);
} else {
- target_at_put(b, dest);
+ jumpChainPutTargetAt(b, dest);
BufferOffset deadline(b.getOffset() +
ImmBranchMaxForwardOffset(CondBranchRangeType));
m_buffer.unregisterBranchDeadline(CondBranchRangeType, deadline);
@@ -1078,14 +1082,14 @@ void Assembler::bind(Label* label, BufferOffset boff) {
IsJalr(editSrc(BufferOffset(next + 4))->InstructionBits()));
DEBUG_PRINTF("\t\ttrampolining: %d\n", next);
} else {
- target_at_put(b, dest);
+ jumpChainPutTargetAt(b, dest);
BufferOffset deadline(
b.getOffset() + ImmBranchMaxForwardOffset(UncondBranchRangeType));
m_buffer.unregisterBranchDeadline(UncondBranchRangeType, deadline);
}
} else {
MOZ_ASSERT(IsAuipc(instr));
- target_at_put(b, dest);
+ jumpChainPutTargetAt(b, dest);
}
} while (next != LabelBase::INVALID_OFFSET);
}
@@ -1124,13 +1128,13 @@ bool Assembler::is_near_branch(Label* L) {
return is_intn((currentOffset() - L->offset()), kBranchOffsetBits);
}
-int32_t Assembler::branch_long_offset(Label* L) {
+int32_t Assembler::branchLongOffset(Label* L) {
if (oom()) {
return kEndOfJumpChain;
}
intptr_t target_pos;
BufferOffset next_instr_offset = nextInstrOffset(2);
- DEBUG_PRINTF("\tbranch_long_offset: %p to (%d)\n", L,
+ DEBUG_PRINTF("\branchLongOffset: %p to (%d)\n", L,
next_instr_offset.getOffset());
if (L->bound()) {
JitSpew(JitSpew_Codegen, ".use Llabel %p on %d", L,
@@ -1142,7 +1146,7 @@ int32_t Assembler::branch_long_offset(Label* L) {
MOZ_ASSERT(p);
MOZ_ASSERT(p->key() == L->offset());
target_pos = p->value().getOffset();
- if (!target_at_put(BufferOffset(target_pos), next_instr_offset)) {
+ if (!jumpChainPutTargetAt(BufferOffset(target_pos), next_instr_offset)) {
DEBUG_PRINTF("\tLabel %p can't be added to link: %d -> %d\n", L,
BufferOffset(target_pos).getOffset(),
next_instr_offset.getOffset());
@@ -1174,13 +1178,13 @@ int32_t Assembler::branch_long_offset(Label* L) {
return static_cast<int32_t>(offset);
}
-int32_t Assembler::branch_offset_helper(Label* L, OffsetSize bits) {
+int32_t Assembler::branchOffsetHelper(Label* L, OffsetSize bits) {
if (oom()) {
return kEndOfJumpChain;
}
int32_t target_pos;
BufferOffset next_instr_offset = nextInstrOffset();
- DEBUG_PRINTF("\tbranch_offset_helper: %p to %d\n", L,
+ DEBUG_PRINTF("\tbranchOffsetHelper: %p to %d\n", L,
next_instr_offset.getOffset());
// This is the last possible branch target.
if (L->bound()) {
@@ -1199,7 +1203,7 @@ int32_t Assembler::branch_offset_helper(Label* L, OffsetSize bits) {
MOZ_ASSERT(p);
MOZ_ASSERT(p->key() == L->offset());
target_pos = p->value().getOffset();
- if (!target_at_put(BufferOffset(target_pos), next_instr_offset)) {
+ if (!jumpChainPutTargetAt(BufferOffset(target_pos), next_instr_offset)) {
DEBUG_PRINTF("\tLabel %p can't be added to link: %d -> %d\n", L,
BufferOffset(target_pos).getOffset(),
next_instr_offset.getOffset());
@@ -1212,18 +1216,18 @@ int32_t Assembler::branch_offset_helper(Label* L, OffsetSize bits) {
NoEnoughLabelCache();
}
return kEndOfJumpChain;
- } else {
- JitSpew(JitSpew_Codegen, ".use Llabel %p on %d", L,
- next_instr_offset.getOffset());
- L->use(next_instr_offset.getOffset());
- bool ok = label_cache_.putNew(L->offset(), next_instr_offset);
- if (!ok) {
- NoEnoughLabelCache();
- }
- DEBUG_PRINTF("\tLabel %p added to link: %d\n", L,
- next_instr_offset.getOffset());
- return kEndOfJumpChain;
}
+
+ JitSpew(JitSpew_Codegen, ".use Llabel %p on %d", L,
+ next_instr_offset.getOffset());
+ L->use(next_instr_offset.getOffset());
+ bool ok = label_cache_.putNew(L->offset(), next_instr_offset);
+ if (!ok) {
+ NoEnoughLabelCache();
+ }
+ DEBUG_PRINTF("\tLabel %p added to link: %d\n", L,
+ next_instr_offset.getOffset());
+ return kEndOfJumpChain;
}
int32_t offset = target_pos - next_instr_offset.getOffset();
@@ -1453,14 +1457,14 @@ void Assembler::retarget(Label* label, Label* target) {
// Find the head of the use chain for label.
do {
- next = next_link(label, false);
+ next = jumpChainNextLink(label, false);
labelBranchOffset = BufferOffset(next);
} while (next != LabelBase::INVALID_OFFSET);
// Then patch the head of label's use chain to the tail of
// target's use chain, prepending the entire use chain of target.
target->use(label->offset());
- target_at_put(labelBranchOffset, BufferOffset(target));
+ jumpChainPutTargetAt(labelBranchOffset, BufferOffset(target));
MOZ_CRASH("check");
} else {
// The target is unbound and unused. We can just take the head of
@@ -1541,7 +1545,8 @@ void Assembler::PatchShortRangeBranchToVeneer(Buffer* buffer, unsigned rangeIdx,
// We want to insert veneer after branch in the linked list of instructions
// that use the same unbound label.
// The veneer should be an unconditional branch.
- int32_t nextElemOffset = target_at(buffer->getInst(branch), branch, false);
+ int32_t nextElemOffset =
+ jumpChainTargetAt(buffer->getInst(branch), branch, false);
int32_t dist;
// If offset is kEndOfChain, this is the end of the linked list.
if (nextElemOffset != kEndOfChain) {
diff --git a/js/src/jit/riscv64/Assembler-riscv64.h b/js/src/jit/riscv64/Assembler-riscv64.h
@@ -361,17 +361,18 @@ class Assembler : public AssemblerShared,
Register getStackPointer() const { return StackPointer; }
void flushBuffer() {}
static int disassembleInstr(Instr instr, bool enable_spew = false);
- int target_at(BufferOffset pos, bool is_internal);
- static int target_at(Instruction* instruction, BufferOffset pos,
- bool is_internal, Instruction* instruction2 = nullptr);
- uint32_t next_link(Label* label, bool is_internal);
- static uint64_t target_address_at(Instruction* pos);
- static void set_target_value_at(Instruction* pc, uint64_t target);
+ int jumpChainTargetAt(BufferOffset pos, bool is_internal);
+ static int jumpChainTargetAt(Instruction* instruction, BufferOffset pos,
+ bool is_internal,
+ Instruction* instruction2 = nullptr);
+ uint32_t jumpChainNextLink(Label* label, bool is_internal);
+ static uint64_t jumpChainTargetAddressAt(Instruction* pos);
+ static void jumpChainSetTargetValueAt(Instruction* pc, uint64_t target);
// Returns true if the target was successfully assembled and spewed.
- bool target_at_put(BufferOffset pos, BufferOffset target_pos,
- bool trampoline = false);
- int32_t branch_offset_helper(Label* L, OffsetSize bits);
- int32_t branch_long_offset(Label* L);
+ bool jumpChainPutTargetAt(BufferOffset pos, BufferOffset target_pos,
+ bool trampoline = false);
+ int32_t branchOffsetHelper(Label* L, OffsetSize bits);
+ int32_t branchLongOffset(Label* L);
// Determines if Label is bound and near enough so that branch instruction
// can be used to reach it, instead of jump instruction.
diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.cpp b/js/src/jit/riscv64/MacroAssembler-riscv64.cpp
@@ -4812,7 +4812,7 @@ void MacroAssemblerRiscv64::ma_mulPtrTestOverflow(Register rd, Register rj,
int32_t MacroAssemblerRiscv64::GetOffset(int32_t offset, Label* L,
OffsetSize bits) {
if (L) {
- offset = branch_offset_helper(L, bits);
+ offset = branchOffsetHelper(L, bits);
} else {
MOZ_ASSERT(is_intn(offset, bits));
}
@@ -4999,13 +4999,13 @@ void MacroAssemblerRiscv64::BranchLong(Label* L) {
// Generate position independent long branch.
UseScratchRegisterScope temps(this);
Register scratch = temps.Acquire();
- int32_t imm = branch_long_offset(L);
+ int32_t imm = branchLongOffset(L);
GenPCRelativeJump(scratch, imm);
}
CodeOffset MacroAssemblerRiscv64::BranchAndLinkLong(Label* L) {
// Generate position independent long branch and link.
- int32_t imm = branch_long_offset(L);
+ int32_t imm = branchLongOffset(L);
UseScratchRegisterScope temps(this);
Register scratch = temps.Acquire();
GenPCRelativeJumpAndLink(scratch, imm);
diff --git a/js/src/jit/riscv64/extension/base-assembler-riscv.h b/js/src/jit/riscv64/extension/base-assembler-riscv.h
@@ -107,7 +107,7 @@ Register ToRegister(uint32_t num);
class AssemblerRiscvBase {
protected:
- virtual int32_t branch_offset_helper(Label* L, OffsetSize bits) = 0;
+ virtual int32_t branchOffsetHelper(Label* L, OffsetSize bits) = 0;
virtual BufferOffset emit(Instr x) = 0;
virtual BufferOffset emit(ShortInstr x) = 0;
diff --git a/js/src/jit/riscv64/extension/base-riscv-i.h b/js/src/jit/riscv64/extension/base-riscv-i.h
@@ -163,72 +163,72 @@ class AssemblerRISCVI : public AssemblerRiscvBase {
static bool IsSlli(Instr instr);
static bool IsLw(Instr instr);
- inline int32_t branch_offset(Label* L) {
- return branch_offset_helper(L, OffsetSize::kOffset13);
+ inline int32_t branchOffset(Label* L) {
+ return branchOffsetHelper(L, OffsetSize::kOffset13);
}
- inline int32_t jump_offset(Label* L) {
- return branch_offset_helper(L, OffsetSize::kOffset21);
+ inline int32_t jumpOffset(Label* L) {
+ return branchOffsetHelper(L, OffsetSize::kOffset21);
}
// Branches
void beq(Register rs1, Register rs2, Label* L) {
- beq(rs1, rs2, branch_offset(L));
+ beq(rs1, rs2, branchOffset(L));
}
void bne(Register rs1, Register rs2, Label* L) {
- bne(rs1, rs2, branch_offset(L));
+ bne(rs1, rs2, branchOffset(L));
}
void blt(Register rs1, Register rs2, Label* L) {
- blt(rs1, rs2, branch_offset(L));
+ blt(rs1, rs2, branchOffset(L));
}
void bge(Register rs1, Register rs2, Label* L) {
- bge(rs1, rs2, branch_offset(L));
+ bge(rs1, rs2, branchOffset(L));
}
void bltu(Register rs1, Register rs2, Label* L) {
- bltu(rs1, rs2, branch_offset(L));
+ bltu(rs1, rs2, branchOffset(L));
}
void bgeu(Register rs1, Register rs2, Label* L) {
- bgeu(rs1, rs2, branch_offset(L));
+ bgeu(rs1, rs2, branchOffset(L));
}
void beqz(Register rs, int16_t imm13) { beq(rs, zero_reg, imm13); }
- void beqz(Register rs1, Label* L) { beqz(rs1, branch_offset(L)); }
+ void beqz(Register rs1, Label* L) { beqz(rs1, branchOffset(L)); }
void bnez(Register rs, int16_t imm13) { bne(rs, zero_reg, imm13); }
- void bnez(Register rs1, Label* L) { bnez(rs1, branch_offset(L)); }
+ void bnez(Register rs1, Label* L) { bnez(rs1, branchOffset(L)); }
void blez(Register rs, int16_t imm13) { bge(zero_reg, rs, imm13); }
- void blez(Register rs1, Label* L) { blez(rs1, branch_offset(L)); }
+ void blez(Register rs1, Label* L) { blez(rs1, branchOffset(L)); }
void bgez(Register rs, int16_t imm13) { bge(rs, zero_reg, imm13); }
- void bgez(Register rs1, Label* L) { bgez(rs1, branch_offset(L)); }
+ void bgez(Register rs1, Label* L) { bgez(rs1, branchOffset(L)); }
void bltz(Register rs, int16_t imm13) { blt(rs, zero_reg, imm13); }
- void bltz(Register rs1, Label* L) { bltz(rs1, branch_offset(L)); }
+ void bltz(Register rs1, Label* L) { bltz(rs1, branchOffset(L)); }
void bgtz(Register rs, int16_t imm13) { blt(zero_reg, rs, imm13); }
- void bgtz(Register rs1, Label* L) { bgtz(rs1, branch_offset(L)); }
+ void bgtz(Register rs1, Label* L) { bgtz(rs1, branchOffset(L)); }
void bgt(Register rs1, Register rs2, int16_t imm13) { blt(rs2, rs1, imm13); }
void bgt(Register rs1, Register rs2, Label* L) {
- bgt(rs1, rs2, branch_offset(L));
+ bgt(rs1, rs2, branchOffset(L));
}
void ble(Register rs1, Register rs2, int16_t imm13) { bge(rs2, rs1, imm13); }
void ble(Register rs1, Register rs2, Label* L) {
- ble(rs1, rs2, branch_offset(L));
+ ble(rs1, rs2, branchOffset(L));
}
void bgtu(Register rs1, Register rs2, int16_t imm13) {
bltu(rs2, rs1, imm13);
}
void bgtu(Register rs1, Register rs2, Label* L) {
- bgtu(rs1, rs2, branch_offset(L));
+ bgtu(rs1, rs2, branchOffset(L));
}
void bleu(Register rs1, Register rs2, int16_t imm13) {
bgeu(rs2, rs1, imm13);
}
void bleu(Register rs1, Register rs2, Label* L) {
- bleu(rs1, rs2, branch_offset(L));
+ bleu(rs1, rs2, branchOffset(L));
}
CodeOffset j(int32_t imm21) { return jal(zero_reg, imm21); }
- CodeOffset j(Label* L) { return j(jump_offset(L)); }
+ CodeOffset j(Label* L) { return j(jumpOffset(L)); }
CodeOffset b(Label* L) { return j(L); }
CodeOffset jal(int32_t imm21) { return jal(ra, imm21); }
- CodeOffset jal(Label* L) { return jal(jump_offset(L)); }
+ CodeOffset jal(Label* L) { return jal(jumpOffset(L)); }
void jr(Register rs) { jalr(zero_reg, rs, 0); }
void jr(Register rs, int32_t imm12) { jalr(zero_reg, rs, imm12); }
void jalr(Register rs, int32_t imm12) { jalr(ra, rs, imm12); }
diff --git a/js/src/jit/riscv64/extension/extension-riscv-c.h b/js/src/jit/riscv64/extension/extension-riscv-c.h
@@ -60,16 +60,16 @@ class AssemblerRISCVC : public AssemblerRiscvBase {
static bool IsCBranch(Instr instr);
static bool IsCJal(Instr instr);
- inline int16_t cjump_offset(Label* L) {
- return (int16_t)branch_offset_helper(L, OffsetSize::kOffset11);
+ inline int16_t cjumpOffset(Label* L) {
+ return (int16_t)branchOffsetHelper(L, OffsetSize::kOffset11);
}
- inline int32_t cbranch_offset(Label* L) {
- return branch_offset_helper(L, OffsetSize::kOffset9);
+ inline int32_t cbranchOffset(Label* L) {
+ return branchOffsetHelper(L, OffsetSize::kOffset9);
}
- void c_j(Label* L) { c_j(cjump_offset(L)); }
- void c_bnez(Register rs1, Label* L) { c_bnez(rs1, cbranch_offset(L)); }
- void c_beqz(Register rs1, Label* L) { c_beqz(rs1, cbranch_offset(L)); }
+ void c_j(Label* L) { c_j(cjumpOffset(L)); }
+ void c_bnez(Register rs1, Label* L) { c_bnez(rs1, cbranchOffset(L)); }
+ void c_beqz(Register rs1, Label* L) { c_beqz(rs1, cbranchOffset(L)); }
};
} // namespace jit
} // namespace js
