tor-browser

commit f8e4fb61645e565b3d8d876c7f351a509bcd354c
parent 0fdd4ee10cf23a943043fe788f9c909a3f6e5811
Author: André Bargull <andre.bargull@gmail.com>
Date:   Thu, 23 Oct 2025 09:56:07 +0000

Bug 1995490 - Part 1: Optimise left-rotate for riscv64. r=spidermonkey-reviewers,iain

`i32.rotl` was compiled to:
```asm
li        t5, 32
remw      t4, a1, t5
negw      t4, t4
addi      t4, t4, 32
negw      t5, t4
sllw      t5, a0, t5
srlw      a0, a0, t4
or        a0, t5, a0
sext.w    a0, a0
```

And now it's directly:
```asm
negw      t4, a1
srlw      t4, a0, t4
sllw      a0, a0, a1
or        a0, t4, a0
sext.w    a0, a0
```

Differential Revision: https://phabricator.services.mozilla.com/D269356

Diffstat:
M
js/src/jit/riscv64/MacroAssembler-riscv64-inl.h
 | 
33
+++++++++++----------------------
M
js/src/jit/riscv64/MacroAssembler-riscv64.cpp
 | 
31
+++++++++++++++++++++++++++++--
M
js/src/jit/riscv64/MacroAssembler-riscv64.h
 | 
3
+++

3 files changed, 43 insertions(+), 24 deletions(-)
diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h b/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h
@@ -1965,41 +1965,29 @@ void MacroAssembler::remainder64(Register lhs, Register rhs, Register dest,
 
 void MacroAssembler::rotateLeft64(Imm32 count, Register64 src, Register64 dest,
                                   Register temp) {
-  Dror(dest.reg, src.reg, Operand(64 - (count.value % 64)));
+  Drol(dest.reg, src.reg, Operand(count.value));
 }
 void MacroAssembler::rotateLeft64(Register count, Register64 src,
                                   Register64 dest, Register temp) {
-  UseScratchRegisterScope temps(this);
-  Register scratch = temps.Acquire();
-  ma_mod32(scratch, count, Operand(64));
-  negw(scratch, scratch);
-  addi(scratch, scratch, 64);
-  Dror(dest.reg, src.reg, Operand(scratch));
+  Drol(dest.reg, src.reg, Operand(count));
 }
 
 void MacroAssembler::rotateLeft(Imm32 count, Register input, Register dest) {
-  JitSpew(JitSpew_Codegen, "[ rotateLeft\n");
-  Ror(dest, input, Operand(32 - (count.value % 32)));
-  JitSpew(JitSpew_Codegen, "]\n");
+  Rol(dest, input, Operand(count.value));
 }
 void MacroAssembler::rotateLeft(Register count, Register input, Register dest) {
-  JitSpew(JitSpew_Codegen, "[ rotateLeft\n");
-  UseScratchRegisterScope temps(this);
-  Register scratch = temps.Acquire();
-  ma_mod32(scratch, count, Operand(32));
-  negw(scratch, scratch);
-  addi(scratch, scratch, 32);
-  Ror(dest, input, Operand(scratch));
-  JitSpew(JitSpew_Codegen, "]\n");
-}
-void MacroAssembler::rotateRight64(Register count, Register64 src,
-                                   Register64 dest, Register temp) {
-  Dror(dest.reg, src.reg, Operand(count));
+  Rol(dest, input, Operand(count));
 }
+
 void MacroAssembler::rotateRight64(Imm32 count, Register64 src, Register64 dest,
                                    Register temp) {
   Dror(dest.reg, src.reg, Operand(count.value));
 }
+void MacroAssembler::rotateRight64(Register count, Register64 src,
+                                   Register64 dest, Register temp) {
+  Dror(dest.reg, src.reg, Operand(count));
+}
+
 void MacroAssembler::rotateRight(Imm32 count, Register input, Register dest) {
   Ror(dest, input, Operand(count.value));
 }
@@ -2007,6 +1995,7 @@ void MacroAssembler::rotateRight(Register count, Register input,
                                  Register dest) {
   Ror(dest, input, Operand(count));
 }
+
 void MacroAssembler::rshift32Arithmetic(Register src, Register dest) {
   sraw(dest, dest, src);
 }
diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.cpp b/js/src/jit/riscv64/MacroAssembler-riscv64.cpp
@@ -6731,10 +6731,24 @@ void MacroAssemblerRiscv64::Float64Min(FPURegister dst, FPURegister src1,
   FloatMinMaxHelper<double>(dst, src1, src2, MaxMinKind::kMin);
 }
 
+void MacroAssemblerRiscv64::Rol(Register rd, Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    UseScratchRegisterScope temps(this);
+    Register scratch = temps.Acquire();
+
+    negw(scratch, rt.rm());
+    srlw(scratch, rs, scratch);
+    sllw(rd, rs, rt.rm());
+    or_(rd, scratch, rd);
+    sext_w(rd, rd);
+  } else {
+    Ror(rd, rs, Operand(32 - (rt.immediate() % 32)));
+  }
+}
+
 void MacroAssemblerRiscv64::Ror(Register rd, Register rs, const Operand& rt) {
   UseScratchRegisterScope temps(this);
   Register scratch = temps.Acquire();
-  BlockTrampolinePoolScope block_trampoline_pool(this, 8);
   if (rt.is_reg()) {
     negw(scratch, rt.rm());
     sllw(scratch, rs, scratch);
@@ -6756,10 +6770,23 @@ void MacroAssemblerRiscv64::Ror(Register rd, Register rs, const Operand& rt) {
   }
 }
 
+void MacroAssemblerRiscv64::Drol(Register rd, Register rs, const Operand& rt) {
+  if (rt.is_reg()) {
+    UseScratchRegisterScope temps(this);
+    Register scratch = temps.Acquire();
+
+    negw(scratch, rt.rm());
+    srl(scratch, rs, scratch);
+    sll(rd, rs, rt.rm());
+    or_(rd, scratch, rd);
+  } else {
+    Dror(rd, rs, Operand(64 - (rt.immediate() % 64)));
+  }
+}
+
 void MacroAssemblerRiscv64::Dror(Register rd, Register rs, const Operand& rt) {
   UseScratchRegisterScope temps(this);
   Register scratch = temps.Acquire();
-  BlockTrampolinePoolScope block_trampoline_pool(this, 8);
   if (rt.is_reg()) {
     negw(scratch, rt.rm());
     sll(scratch, rs, scratch);
diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.h b/js/src/jit/riscv64/MacroAssembler-riscv64.h
@@ -555,6 +555,9 @@ class MacroAssemblerRiscv64 : public Assembler {
   void ByteSwap(Register dest, Register src, int operand_size,
                 Register scratch);
 
+  void Rol(Register rd, Register rs, const Operand& rt);
+  void Drol(Register rd, Register rs, const Operand& rt);
+
   void Ror(Register rd, Register rs, const Operand& rt);
   void Dror(Register rd, Register rs, const Operand& rt);