tor-browser

commit d4d506054dd31dfa1b8ec4e44a6f7d42ea5f4ee1
parent 3a48a0424663e45ef94324391a07093513533b43
Author: André Bargull <andre.bargull@gmail.com>
Date:   Mon, 27 Oct 2025 15:22:13 +0000

Bug 1996345 - Part 3: Support MEM_SCALE_NOBASE for 64-bit lea. r=spidermonkey-reviewers,iain

Used in the next part.

Differential Revision: https://phabricator.services.mozilla.com/D270023

Diffstat:
M
js/src/jit/x64/Assembler-x64.h
 | 
3
+++
M
js/src/jit/x64/BaseAssembler-x64.h
 | 
6
++++++
M
js/src/jit/x86-shared/BaseAssembler-x86-shared.h
 | 
8
++++++++

3 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/js/src/jit/x64/Assembler-x64.h b/js/src/jit/x64/Assembler-x64.h
@@ -1043,6 +1043,9 @@ class Assembler : public AssemblerX86Shared {
         masm.leaq_mr(src.disp(), src.base(), src.index(), src.scale(),
                      dest.encoding());
         break;
+      case Operand::MEM_SCALE_NOBASE:
+        masm.leaq_mr(src.disp(), src.index(), src.scale(), dest.encoding());
+        break;
       default:
         MOZ_CRASH("unexepcted operand kind");
     }
diff --git a/js/src/jit/x64/BaseAssembler-x64.h b/js/src/jit/x64/BaseAssembler-x64.h
@@ -711,6 +711,12 @@ class BaseAssemblerX64 : public BaseAssembler {
     m_formatter.oneByteOp64(OP_LEA, offset, base, index, scale, dst);
   }
 
+  void leaq_mr(int32_t offset, RegisterID index, int scale, RegisterID dst) {
+    spew("leaq       " MEM_os ", %s", ADDR_os(offset, index, scale),
+         GPReg64Name(dst));
+    m_formatter.oneByteOp64_disp32(OP_LEA, offset, index, scale, dst);
+  }
+
   void movq_i32m(int32_t imm, int32_t offset, RegisterID base) {
     spew("movq       $%d, " MEM_ob, imm, ADDR_ob(offset, base));
     m_formatter.oneByteOp64(OP_GROUP11_EvIz, offset, base, GROUP11_MOV);
diff --git a/js/src/jit/x86-shared/BaseAssembler-x86-shared.h b/js/src/jit/x86-shared/BaseAssembler-x86-shared.h
@@ -5998,6 +5998,14 @@ class BaseAssembler : public GenericAssembler {
       memoryModRM(offset, base, index, scale, reg);
     }
 
+    void oneByteOp64_disp32(OneByteOpcodeID opcode, int32_t offset,
+                            RegisterID index, int scale, int reg) {
+      m_buffer.ensureSpace(MaxInstructionSize);
+      emitRexW(reg, index, 0);
+      m_buffer.putByteUnchecked(opcode);
+      memoryModRM_disp32(offset, index, scale, reg);
+    }
+
     void oneByteOp64(OneByteOpcodeID opcode, const void* address, int reg) {
       m_buffer.ensureSpace(MaxInstructionSize);
       emitRexW(reg, 0, 0);