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commit d1682df686a5df5921a0ac888621b4105317c8c3
parent 4ef5ff63b2fd3ec569436a7016b64d767c1a25fa
Author: Rong "Mantle" Bao <webmaster@csmantle.top>
Date:   Mon,  5 Jan 2026 15:30:18 +0000

Bug 2008301 - [riscv64] Part 2: Defer scratch allocation in demanding atomic ops for riscv64. r=jandem

Differential Revision: https://phabricator.services.mozilla.com/D277738

Diffstat:
M
js/src/jit/riscv64/MacroAssembler-riscv64.cpp
 | 
21
+++++++++++++--------

1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.cpp b/js/src/jit/riscv64/MacroAssembler-riscv64.cpp
@@ -2597,12 +2597,11 @@ static void AtomicExchange(MacroAssembler& masm,
                            const T& mem, Register value, Register valueTemp,
                            Register offsetTemp, Register maskTemp,
                            Register output) {
-  UseScratchRegisterScope temps(&masm);
-  Register scratch = temps.Acquire();
-  Register scratch2 = temps.Acquire();
   bool signExtend = Scalar::isSignedIntType(type);
   unsigned nbytes = Scalar::byteSize(type);
 
+  UseScratchRegisterScope temps(&masm);
+
   switch (nbytes) {
     case 1:
     case 2:
@@ -2618,8 +2617,11 @@ static void AtomicExchange(MacroAssembler& masm,
 
   Label again;
 
+  Register scratch = temps.Acquire();
   masm.computeEffectiveAddress(mem, scratch);
 
+  Register scratch2 = temps.Acquire();
+
   if (nbytes == 4) {
     masm.memoryBarrierBefore(sync);
     masm.bind(&again);
@@ -2791,8 +2793,6 @@ static void AtomicEffectOp(MacroAssembler& masm,
                            const T& mem, Register value, Register valueTemp,
                            Register offsetTemp, Register maskTemp) {
   UseScratchRegisterScope temps(&masm);
-  Register scratch = temps.Acquire();
-  Register scratch2 = temps.Acquire();
   unsigned nbytes = Scalar::byteSize(type);
 
   switch (nbytes) {
@@ -2810,8 +2810,11 @@ static void AtomicEffectOp(MacroAssembler& masm,
 
   Label again;
 
+  Register scratch = temps.Acquire();
   masm.computeEffectiveAddress(mem, scratch);
 
+  Register scratch2 = temps.Acquire();
+
   if (nbytes == 4) {
     masm.memoryBarrierBefore(sync);
     masm.bind(&again);
@@ -2921,8 +2924,6 @@ static void AtomicFetchOp(MacroAssembler& masm,
                           Register offsetTemp, Register maskTemp,
                           Register output) {
   UseScratchRegisterScope temps(&masm);
-  Register scratch = temps.Acquire();
-  Register scratch2 = temps.Acquire();
   bool signExtend = Scalar::isSignedIntType(type);
   unsigned nbytes = Scalar::byteSize(type);
 
@@ -2941,8 +2942,11 @@ static void AtomicFetchOp(MacroAssembler& masm,
 
   Label again;
 
+  Register scratch = temps.Acquire();
   masm.computeEffectiveAddress(mem, scratch);
 
+  Register scratch2 = temps.Acquire();
+
   if (nbytes == 4) {
     masm.memoryBarrierBefore(sync);
     masm.bind(&again);
@@ -3442,9 +3446,10 @@ static void CompareExchange64(MacroAssembler& masm,
   MOZ_ASSERT(expect != output && replace != output);
   UseScratchRegisterScope temps(&masm);
   Register scratch = temps.Acquire();
-  Register scratch2 = temps.Acquire();
   masm.computeEffectiveAddress(mem, scratch);
 
+  Register scratch2 = temps.Acquire();
+
   Label tryAgain;
   Label exit;