tor-browser

commit c3bc83c52bfec78ce37621fd16cb28a701645e1a
parent 3f463ccfc6938fdd5fcaaede6608feb4e2c0ff0d
Author: André Bargull <andre.bargull@gmail.com>
Date:   Wed, 22 Oct 2025 15:31:21 +0000

Bug 1995704 - Part 2: MPowHalf lowering to shared Lowering.cpp. r=spidermonkey-reviewers,jandem

All architectures now use `useRegisterAtStart` + `define`, so lowering no
longer needs to be per-architecture.

Differential Revision: https://phabricator.services.mozilla.com/D269549

Diffstat:
M
js/src/jit/Lowering.cpp
 | 
7
+++++++
M
js/src/jit/arm/Lowering-arm.cpp
 | 
7
-------
M
js/src/jit/arm64/Lowering-arm64.cpp
 | 
7
-------
M
js/src/jit/loong64/Lowering-loong64.cpp
 | 
7
-------
M
js/src/jit/mips-shared/Lowering-mips-shared.cpp
 | 
7
-------
M
js/src/jit/riscv64/Lowering-riscv64.cpp
 | 
7
-------
M
js/src/jit/x86-shared/Lowering-x86-shared.cpp
 | 
7
-------

7 files changed, 7 insertions(+), 42 deletions(-)
diff --git a/js/src/jit/Lowering.cpp b/js/src/jit/Lowering.cpp
@@ -2152,6 +2152,13 @@ void LIRGenerator::visitPow(MPow* ins) {
   defineReturn(lir, ins);
 }
 
+void LIRGenerator::visitPowHalf(MPowHalf* ins) {
+  MDefinition* input = ins->input();
+  MOZ_ASSERT(input->type() == MIRType::Double);
+  auto* lir = new (alloc()) LPowHalfD(useRegisterAtStart(input));
+  define(lir, ins);
+}
+
 void LIRGenerator::visitSign(MSign* ins) {
   MOZ_ASSERT(ins->type() == MIRType::Int32 || ins->type() == MIRType::Double);
   MOZ_ASSERT(ins->input()->type() == MIRType::Int32 ||
diff --git a/js/src/jit/arm/Lowering-arm.cpp b/js/src/jit/arm/Lowering-arm.cpp
@@ -496,13 +496,6 @@ void LIRGeneratorARM::lowerUModI64(MMod* mod) {
   MOZ_CRASH("We use MWasmBuiltinModI64 instead.");
 }
 
-void LIRGenerator::visitPowHalf(MPowHalf* ins) {
-  MDefinition* input = ins->input();
-  MOZ_ASSERT(input->type() == MIRType::Double);
-  LPowHalfD* lir = new (alloc()) LPowHalfD(useRegisterAtStart(input));
-  define(lir, ins);
-}
-
 void LIRGeneratorARM::lowerWasmSelectI(MWasmSelect* select) {
   auto* lir = new (alloc())
       LWasmSelect(useRegisterAtStart(select->trueExpr()),
diff --git a/js/src/jit/arm64/Lowering-arm64.cpp b/js/src/jit/arm64/Lowering-arm64.cpp
@@ -360,13 +360,6 @@ void LIRGeneratorARM64::lowerWasmBuiltinModI64(MWasmBuiltinModI64* mod) {
   MOZ_CRASH("We don't use runtime mod for this architecture");
 }
 
-void LIRGenerator::visitPowHalf(MPowHalf* ins) {
-  MDefinition* input = ins->input();
-  MOZ_ASSERT(input->type() == MIRType::Double);
-  LPowHalfD* lir = new (alloc()) LPowHalfD(useRegisterAtStart(input));
-  define(lir, ins);
-}
-
 void LIRGeneratorARM64::lowerWasmSelectI(MWasmSelect* select) {
   if (select->type() == MIRType::Simd128) {
     LAllocation t = useRegisterAtStart(select->trueExpr());
diff --git a/js/src/jit/loong64/Lowering-loong64.cpp b/js/src/jit/loong64/Lowering-loong64.cpp
@@ -557,13 +557,6 @@ void LIRGenerator::visitCopySign(MCopySign* ins) {
   define(lir, ins);
 }
 
-void LIRGenerator::visitPowHalf(MPowHalf* ins) {
-  MDefinition* input = ins->input();
-  MOZ_ASSERT(input->type() == MIRType::Double);
-  LPowHalfD* lir = new (alloc()) LPowHalfD(useRegisterAtStart(input));
-  define(lir, ins);
-}
-
 void LIRGenerator::visitExtendInt32ToInt64(MExtendInt32ToInt64* ins) {
   defineInt64(
       new (alloc()) LExtendInt32ToInt64(useRegisterAtStart(ins->input())), ins);
diff --git a/js/src/jit/mips-shared/Lowering-mips-shared.cpp b/js/src/jit/mips-shared/Lowering-mips-shared.cpp
@@ -265,13 +265,6 @@ void LIRGeneratorMIPSShared::lowerModI(MMod* mod) {
   define(lir, mod);
 }
 
-void LIRGenerator::visitPowHalf(MPowHalf* ins) {
-  MDefinition* input = ins->input();
-  MOZ_ASSERT(input->type() == MIRType::Double);
-  LPowHalfD* lir = new (alloc()) LPowHalfD(useRegisterAtStart(input));
-  define(lir, ins);
-}
-
 void LIRGeneratorMIPSShared::lowerWasmSelectI(MWasmSelect* select) {
   auto* lir = new (alloc())
       LWasmSelect(useRegisterAtStart(select->trueExpr()),
diff --git a/js/src/jit/riscv64/Lowering-riscv64.cpp b/js/src/jit/riscv64/Lowering-riscv64.cpp
@@ -557,13 +557,6 @@ void LIRGenerator::visitCopySign(MCopySign* ins) {
   define(lir, ins);
 }
 
-void LIRGenerator::visitPowHalf(MPowHalf* ins) {
-  MDefinition* input = ins->input();
-  MOZ_ASSERT(input->type() == MIRType::Double);
-  LPowHalfD* lir = new (alloc()) LPowHalfD(useRegisterAtStart(input));
-  define(lir, ins);
-}
-
 void LIRGenerator::visitExtendInt32ToInt64(MExtendInt32ToInt64* ins) {
   defineInt64(
       new (alloc()) LExtendInt32ToInt64(useRegisterAtStart(ins->input())), ins);
diff --git a/js/src/jit/x86-shared/Lowering-x86-shared.cpp b/js/src/jit/x86-shared/Lowering-x86-shared.cpp
@@ -34,13 +34,6 @@ LTableSwitchV* LIRGeneratorX86Shared::newLTableSwitchV(
   return new (alloc()) LTableSwitchV(in, temp(), tempDouble(), temp());
 }
 
-void LIRGenerator::visitPowHalf(MPowHalf* ins) {
-  MDefinition* input = ins->input();
-  MOZ_ASSERT(input->type() == MIRType::Double);
-  LPowHalfD* lir = new (alloc()) LPowHalfD(useRegisterAtStart(input));
-  define(lir, ins);
-}
-
 LUse LIRGeneratorX86Shared::useShiftRegister(MDefinition* mir) {
   // Unless BMI2 is available, the shift register must be ecx. x86 can't shift a
   // non-ecx register.