tor-browser

commit a176d53b5cfb10610b600d34cbe36a2cee8f961a
parent 533148120333f8a4704b428772e9c4691b65f619
Author: André Bargull <andre.bargull@gmail.com>
Date:   Fri, 17 Oct 2025 11:25:41 +0000

Bug 1992993 - Part 2: Fix unused variable warnings in non-debug builds. r=spidermonkey-reviewers,iain

Differential Revision: https://phabricator.services.mozilla.com/D267790

Diffstat:
M
js/src/jit/loong64/MacroAssembler-loong64.cpp
 | 
1
+
M
js/src/jit/mips64/MacroAssembler-mips64.cpp
 | 
5
+++--
M
js/src/jit/mips64/Simulator-mips64.cpp
 | 
2
++
M
js/src/jit/riscv64/Assembler-riscv64.cpp
 | 
3
+++
M
js/src/jit/riscv64/MacroAssembler-riscv64.cpp
 | 
5
+++--
M
js/src/jit/riscv64/Simulator-riscv64.cpp
 | 
2
++

6 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/js/src/jit/loong64/MacroAssembler-loong64.cpp b/js/src/jit/loong64/MacroAssembler-loong64.cpp
@@ -2802,6 +2802,7 @@ void MacroAssembler::storeRegsInMask(LiveRegisterSet set, Address dest,
     }
   }
   MOZ_ASSERT(numFpu == 0);
+
   diffF -= diffF % sizeof(uintptr_t);
   MOZ_ASSERT(diffF == 0);
 }
diff --git a/js/src/jit/mips64/MacroAssembler-mips64.cpp b/js/src/jit/mips64/MacroAssembler-mips64.cpp
@@ -2523,9 +2523,9 @@ void MacroAssembler::PopRegsInMaskIgnore(LiveRegisterSet set,
 void MacroAssembler::storeRegsInMask(LiveRegisterSet set, Address dest,
                                      Register) {
   FloatRegisterSet fpuSet(set.fpus().reduceSetForPush());
-  unsigned numFpu = fpuSet.size();
+  mozilla::DebugOnly<unsigned> numFpu = fpuSet.size();
   int32_t diffF = fpuSet.getPushSizeInBytes();
-  int32_t diffG = set.gprs().size() * sizeof(intptr_t);
+  mozilla::DebugOnly<int32_t> diffG = set.gprs().size() * sizeof(intptr_t);
 
   MOZ_ASSERT(dest.offset >= diffG + diffF);
 
@@ -2554,6 +2554,7 @@ void MacroAssembler::storeRegsInMask(LiveRegisterSet set, Address dest,
     }
   }
   MOZ_ASSERT(numFpu == 0);
+
   diffF -= diffF % sizeof(uintptr_t);
   MOZ_ASSERT(diffF == 0);
 }
diff --git a/js/src/jit/mips64/Simulator-mips64.cpp b/js/src/jit/mips64/Simulator-mips64.cpp
@@ -1161,11 +1161,13 @@ void SimulatorProcess::checkICacheLocked(SimInstruction* instr) {
   char* cached_line = cache_page->cachedData(offset & ~CachePage::kLineMask);
 
   if (cache_hit) {
+#ifdef DEBUG
     // Check that the data in memory matches the contents of the I-cache.
     int cmpret =
         memcmp(reinterpret_cast<void*>(instr), cache_page->cachedData(offset),
                SimInstruction::kInstrSize);
     MOZ_ASSERT(cmpret == 0);
+#endif
   } else {
     // Cache miss.  Load memory into the cache.
     memcpy(cached_line, line, CachePage::kLineLength);
diff --git a/js/src/jit/riscv64/Assembler-riscv64.cpp b/js/src/jit/riscv64/Assembler-riscv64.cpp
@@ -1496,11 +1496,13 @@ bool Assembler::appendRawCode(const uint8_t* code, size_t numBytes) {
 }
 
 void Assembler::ToggleCall(CodeLocationLabel inst_, bool enabled) {
+#ifdef DEBUG
   Instruction* i0 = (Instruction*)inst_.raw();
   Instruction* i1 = (Instruction*)(inst_.raw() + 1 * kInstrSize);
   Instruction* i2 = (Instruction*)(inst_.raw() + 2 * kInstrSize);
   Instruction* i3 = (Instruction*)(inst_.raw() + 3 * kInstrSize);
   Instruction* i4 = (Instruction*)(inst_.raw() + 4 * kInstrSize);
+#endif
   Instruction* i5 = (Instruction*)(inst_.raw() + 5 * kInstrSize);
   Instruction* i6 = (Instruction*)(inst_.raw() + 6 * kInstrSize);
 
@@ -1510,6 +1512,7 @@ void Assembler::ToggleCall(CodeLocationLabel inst_, bool enabled) {
   MOZ_ASSERT(IsOri(i3->InstructionBits()));
   MOZ_ASSERT(IsSlli(i4->InstructionBits()));
   MOZ_ASSERT(IsOri(i5->InstructionBits()));
+
   if (enabled) {
     Instr jalr_ = JALR | (ra.code() << kRdShift) | (0x0 << kFunct3Shift) |
                   (i5->RdValue() << kRs1Shift) | (0x0 << kImm12Shift);
diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.cpp b/js/src/jit/riscv64/MacroAssembler-riscv64.cpp
@@ -4102,9 +4102,9 @@ void MacroAssembler::speculationBarrier() { MOZ_CRASH(); }
 void MacroAssembler::storeRegsInMask(LiveRegisterSet set, Address dest,
                                      Register) {
   FloatRegisterSet fpuSet(set.fpus().reduceSetForPush());
-  unsigned numFpu = fpuSet.size();
+  mozilla::DebugOnly<unsigned> numFpu = fpuSet.size();
   int32_t diffF = fpuSet.getPushSizeInBytes();
-  int32_t diffG = set.gprs().size() * sizeof(intptr_t);
+  mozilla::DebugOnly<int32_t> diffG = set.gprs().size() * sizeof(intptr_t);
 
   MOZ_ASSERT(dest.offset >= diffG + diffF);
 
@@ -4133,6 +4133,7 @@ void MacroAssembler::storeRegsInMask(LiveRegisterSet set, Address dest,
     }
   }
   MOZ_ASSERT(numFpu == 0);
+
   diffF -= diffF % sizeof(uintptr_t);
   MOZ_ASSERT(diffF == 0);
 }
diff --git a/js/src/jit/riscv64/Simulator-riscv64.cpp b/js/src/jit/riscv64/Simulator-riscv64.cpp
@@ -928,10 +928,12 @@ void SimulatorProcess::checkICacheLocked(SimInstruction* instr) {
   char* cached_line = cache_page->cachedData(offset & ~CachePage::kLineMask);
 
   if (cache_hit) {
+#  ifdef DEBUG
     // Check that the data in memory matches the contents of the I-cache.
     int cmpret = memcmp(reinterpret_cast<void*>(instr),
                         cache_page->cachedData(offset), kInstrSize);
     MOZ_ASSERT(cmpret == 0);
+#  endif
   } else {
     // Cache miss.  Load memory into the cache.
     memcpy(cached_line, line, CachePage::kLineLength);