tor-browser

commit 7ee3625ee3bea342ef4b85ba2b6910f5cfd4e6d3
parent 4606d1d281fd5788675f4979439cdfbf5c3bf782
Author: André Bargull <andre.bargull@gmail.com>
Date:   Fri, 17 Oct 2025 11:25:42 +0000

Bug 1992993 - Part 8: Disable testJitRegisterSet_FPU_Aliases for MIPS. r=spidermonkey-reviewers,iain

The MIPS implementation only allows calling `FloatRegister::alignedAliased` for
Double FP registers, but this test also uses Single FP registers.

Maybe the `isDouble()` in the MIPS implementation is wrong, but for now simply
disable this test.

Differential Revision: https://phabricator.services.mozilla.com/D267796

Diffstat:
M
js/src/jsapi-tests/testJitRegisterSet.cpp
 | 
5
+++++

1 file changed, 5 insertions(+), 0 deletions(-)
diff --git a/js/src/jsapi-tests/testJitRegisterSet.cpp b/js/src/jsapi-tests/testJitRegisterSet.cpp
@@ -168,6 +168,10 @@ void pullAllFpus(AllocatableFloatRegisterSet& set, uint32_t& max_bits,
   }
 }
 
+// TODO: MIPS64 only allows calling |alignedAliased| for Double FP registers.
+// Disable this test for MIPS64 until it's clear that that restriction is
+// actually correct. (bug 1993738)
+#ifndef JS_CODEGEN_MIPS64
 BEGIN_TEST(testJitRegisterSet_FPU_Aliases) {
   BEGIN_All_WALK(FloatRegisters::Total);
   FOR_ALL_REGISTERS(FloatRegister, reg) {
@@ -209,3 +213,4 @@ BEGIN_TEST(testJitRegisterSet_FPU_Aliases) {
   return true;
 }
 END_TEST(testJitRegisterSet_FPU_Aliases)
+#endif