complex_bit_reverse_mips.c (9571B)
1 /* 2 * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved. 3 * 4 * Use of this source code is governed by a BSD-style license 5 * that can be found in the LICENSE file in the root of the source 6 * tree. An additional intellectual property rights grant can be found 7 * in the file PATENTS. All contributing project authors may 8 * be found in the AUTHORS file in the root of the source tree. 9 */ 10 11 #include "common_audio/signal_processing/include/signal_processing_library.h" 12 13 static int16_t coefTable_7[] = { 14 4, 256, 8, 128, 12, 384, 16, 64, 20, 320, 24, 192, 28, 448, 15 36, 288, 40, 160, 44, 416, 48, 96, 52, 352, 56, 224, 60, 480, 16 68, 272, 72, 144, 76, 400, 84, 336, 88, 208, 92, 464, 100, 304, 17 104, 176, 108, 432, 116, 368, 120, 240, 124, 496, 132, 264, 140, 392, 18 148, 328, 152, 200, 156, 456, 164, 296, 172, 424, 180, 360, 184, 232, 19 188, 488, 196, 280, 204, 408, 212, 344, 220, 472, 228, 312, 236, 440, 20 244, 376, 252, 504, 268, 388, 276, 324, 284, 452, 300, 420, 308, 356, 21 316, 484, 332, 404, 348, 468, 364, 436, 380, 500, 412, 460, 444, 492}; 22 23 static int16_t coefTable_8[] = { 24 4, 512, 8, 256, 12, 768, 16, 128, 20, 640, 24, 384, 28, 896, 25 32, 64, 36, 576, 40, 320, 44, 832, 48, 192, 52, 704, 56, 448, 26 60, 960, 68, 544, 72, 288, 76, 800, 80, 160, 84, 672, 88, 416, 27 92, 928, 100, 608, 104, 352, 108, 864, 112, 224, 116, 736, 120, 480, 28 124, 992, 132, 528, 136, 272, 140, 784, 148, 656, 152, 400, 156, 912, 29 164, 592, 168, 336, 172, 848, 176, 208, 180, 720, 184, 464, 188, 976, 30 196, 560, 200, 304, 204, 816, 212, 688, 216, 432, 220, 944, 228, 624, 31 232, 368, 236, 880, 244, 752, 248, 496, 252, 1008, 260, 520, 268, 776, 32 276, 648, 280, 392, 284, 904, 292, 584, 296, 328, 300, 840, 308, 712, 33 312, 456, 316, 968, 324, 552, 332, 808, 340, 680, 344, 424, 348, 936, 34 356, 616, 364, 872, 372, 744, 376, 488, 380, 1000, 388, 536, 396, 792, 35 404, 664, 412, 920, 420, 600, 428, 856, 436, 728, 440, 472, 444, 984, 36 452, 568, 460, 824, 468, 696, 476, 952, 484, 632, 492, 888, 500, 760, 37 508, 1016, 524, 772, 532, 644, 540, 900, 548, 580, 556, 836, 564, 708, 38 572, 964, 588, 804, 596, 676, 604, 932, 620, 868, 628, 740, 636, 996, 39 652, 788, 668, 916, 684, 852, 692, 724, 700, 980, 716, 820, 732, 948, 40 748, 884, 764, 1012, 796, 908, 812, 844, 828, 972, 860, 940, 892, 1004, 41 956, 988}; 42 43 void WebRtcSpl_ComplexBitReverse(int16_t frfi[], int stages) { 44 int l; 45 int16_t tr, ti; 46 int32_t tmp1, tmp2, tmp3, tmp4; 47 int32_t* ptr_i; 48 int32_t* ptr_j; 49 50 if (stages == 8) { 51 int16_t* pcoeftable_8 = coefTable_8; 52 53 __asm __volatile( 54 ".set push \n\t" 55 ".set noreorder \n\t" 56 "addiu %[l], $zero, 120 \n\t" 57 "1: \n\t" 58 "addiu %[l], %[l], -4 \n\t" 59 "lh %[tr], 0(%[pcoeftable_8]) \n\t" 60 "lh %[ti], 2(%[pcoeftable_8]) \n\t" 61 "lh %[tmp3], 4(%[pcoeftable_8]) \n\t" 62 "lh %[tmp4], 6(%[pcoeftable_8]) \n\t" 63 "addu %[ptr_i], %[frfi], %[tr] \n\t" 64 "addu %[ptr_j], %[frfi], %[ti] \n\t" 65 "addu %[tr], %[frfi], %[tmp3] \n\t" 66 "addu %[ti], %[frfi], %[tmp4] \n\t" 67 "ulw %[tmp1], 0(%[ptr_i]) \n\t" 68 "ulw %[tmp2], 0(%[ptr_j]) \n\t" 69 "ulw %[tmp3], 0(%[tr]) \n\t" 70 "ulw %[tmp4], 0(%[ti]) \n\t" 71 "usw %[tmp1], 0(%[ptr_j]) \n\t" 72 "usw %[tmp2], 0(%[ptr_i]) \n\t" 73 "usw %[tmp4], 0(%[tr]) \n\t" 74 "usw %[tmp3], 0(%[ti]) \n\t" 75 "lh %[tmp1], 8(%[pcoeftable_8]) \n\t" 76 "lh %[tmp2], 10(%[pcoeftable_8]) \n\t" 77 "lh %[tr], 12(%[pcoeftable_8]) \n\t" 78 "lh %[ti], 14(%[pcoeftable_8]) \n\t" 79 "addu %[ptr_i], %[frfi], %[tmp1] \n\t" 80 "addu %[ptr_j], %[frfi], %[tmp2] \n\t" 81 "addu %[tr], %[frfi], %[tr] \n\t" 82 "addu %[ti], %[frfi], %[ti] \n\t" 83 "ulw %[tmp1], 0(%[ptr_i]) \n\t" 84 "ulw %[tmp2], 0(%[ptr_j]) \n\t" 85 "ulw %[tmp3], 0(%[tr]) \n\t" 86 "ulw %[tmp4], 0(%[ti]) \n\t" 87 "usw %[tmp1], 0(%[ptr_j]) \n\t" 88 "usw %[tmp2], 0(%[ptr_i]) \n\t" 89 "usw %[tmp4], 0(%[tr]) \n\t" 90 "usw %[tmp3], 0(%[ti]) \n\t" 91 "bgtz %[l], 1b \n\t" 92 " addiu %[pcoeftable_8], %[pcoeftable_8], 16 \n\t" 93 ".set pop \n\t" 94 95 : [tmp1] "=&r"(tmp1), [tmp2] "=&r"(tmp2), [ptr_i] "=&r"(ptr_i), 96 [ptr_j] "=&r"(ptr_j), [tr] "=&r"(tr), [l] "=&r"(l), 97 [tmp3] "=&r"(tmp3), [pcoeftable_8] "+r"(pcoeftable_8), [ti] "=&r"(ti), 98 [tmp4] "=&r"(tmp4) 99 : [frfi] "r"(frfi) 100 : "memory"); 101 } else if (stages == 7) { 102 int16_t* pcoeftable_7 = coefTable_7; 103 104 __asm __volatile( 105 ".set push \n\t" 106 ".set noreorder \n\t" 107 "addiu %[l], $zero, 56 \n\t" 108 "1: \n\t" 109 "addiu %[l], %[l], -4 \n\t" 110 "lh %[tr], 0(%[pcoeftable_7]) \n\t" 111 "lh %[ti], 2(%[pcoeftable_7]) \n\t" 112 "lh %[tmp3], 4(%[pcoeftable_7]) \n\t" 113 "lh %[tmp4], 6(%[pcoeftable_7]) \n\t" 114 "addu %[ptr_i], %[frfi], %[tr] \n\t" 115 "addu %[ptr_j], %[frfi], %[ti] \n\t" 116 "addu %[tr], %[frfi], %[tmp3] \n\t" 117 "addu %[ti], %[frfi], %[tmp4] \n\t" 118 "ulw %[tmp1], 0(%[ptr_i]) \n\t" 119 "ulw %[tmp2], 0(%[ptr_j]) \n\t" 120 "ulw %[tmp3], 0(%[tr]) \n\t" 121 "ulw %[tmp4], 0(%[ti]) \n\t" 122 "usw %[tmp1], 0(%[ptr_j]) \n\t" 123 "usw %[tmp2], 0(%[ptr_i]) \n\t" 124 "usw %[tmp4], 0(%[tr]) \n\t" 125 "usw %[tmp3], 0(%[ti]) \n\t" 126 "lh %[tmp1], 8(%[pcoeftable_7]) \n\t" 127 "lh %[tmp2], 10(%[pcoeftable_7]) \n\t" 128 "lh %[tr], 12(%[pcoeftable_7]) \n\t" 129 "lh %[ti], 14(%[pcoeftable_7]) \n\t" 130 "addu %[ptr_i], %[frfi], %[tmp1] \n\t" 131 "addu %[ptr_j], %[frfi], %[tmp2] \n\t" 132 "addu %[tr], %[frfi], %[tr] \n\t" 133 "addu %[ti], %[frfi], %[ti] \n\t" 134 "ulw %[tmp1], 0(%[ptr_i]) \n\t" 135 "ulw %[tmp2], 0(%[ptr_j]) \n\t" 136 "ulw %[tmp3], 0(%[tr]) \n\t" 137 "ulw %[tmp4], 0(%[ti]) \n\t" 138 "usw %[tmp1], 0(%[ptr_j]) \n\t" 139 "usw %[tmp2], 0(%[ptr_i]) \n\t" 140 "usw %[tmp4], 0(%[tr]) \n\t" 141 "usw %[tmp3], 0(%[ti]) \n\t" 142 "bgtz %[l], 1b \n\t" 143 " addiu %[pcoeftable_7], %[pcoeftable_7], 16 \n\t" 144 ".set pop \n\t" 145 146 : [tmp1] "=&r"(tmp1), [tmp2] "=&r"(tmp2), [ptr_i] "=&r"(ptr_i), 147 [ptr_j] "=&r"(ptr_j), [ti] "=&r"(ti), [tr] "=&r"(tr), [l] "=&r"(l), 148 [pcoeftable_7] "+r"(pcoeftable_7), [tmp3] "=&r"(tmp3), 149 [tmp4] "=&r"(tmp4) 150 : [frfi] "r"(frfi) 151 : "memory"); 152 } 153 }