cpu.S (2433B)
1 /****************************************************************************** 2 * Copyright © 2018, VideoLAN and dav1d authors 3 * Copyright © 2024, Nathan Egge 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, this 10 * list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 *****************************************************************************/ 27 28 #include "src/riscv/asm.S" 29 30 // This function detects non-compliant RVV 0.7.1 hardware which reports support 31 // for the V extension through HWCAP, by intentionally setting tail and mask 32 // agnostic vector configurations that were only introduced in RVV 0.9 spec. 33 // Existing non-compliant (pre RVV 1.0) hardware will set the VILL bit in VTYPE 34 // (indicating an illegal vector configuration) which is stored in the XLEN-1 35 // bit position, thus a simple sign check is sufficient for detection. 36 // This work around is inexpensive and harmless on compliant hardware, but we 37 // should still consider removing it once all non-compliant RVV 0.7.1 hardware 38 // is out of service. 39 function has_compliant_rvv, export=1, ext=v 40 vsetvli t0, zero, e8, m1, ta, ma 41 csrr a0, vtype 42 sgtz a0, a0 43 ret 44 endfunc 45 46 function get_vlenb, export=1 47 csrr a0, vlenb 48 ret 49 endfunc