reconinter_ssse3.c (4755B)
1 /* 2 * Copyright (c) 2018, Alliance for Open Media. All rights reserved. 3 * 4 * This source code is subject to the terms of the BSD 2 Clause License and 5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License 6 * was not distributed with this source code in the LICENSE file, you can 7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open 8 * Media Patent License 1.0 was not distributed with this source code in the 9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent. 10 */ 11 12 #include "config/av1_rtcd.h" 13 14 #if CONFIG_AV1_HIGHBITDEPTH 15 16 #include <tmmintrin.h> 17 18 #include "aom/aom_integer.h" 19 #include "aom_dsp/blend.h" 20 #include "aom_dsp/x86/synonyms.h" 21 #include "av1/common/blockd.h" 22 23 void av1_build_compound_diffwtd_mask_highbd_ssse3( 24 uint8_t *mask, DIFFWTD_MASK_TYPE mask_type, const uint8_t *src0, 25 int src0_stride, const uint8_t *src1, int src1_stride, int h, int w, 26 int bd) { 27 if (w < 8) { 28 av1_build_compound_diffwtd_mask_highbd_c(mask, mask_type, src0, src0_stride, 29 src1, src1_stride, h, w, bd); 30 } else { 31 assert(bd >= 8); 32 assert((w % 8) == 0); 33 assert(mask_type == DIFFWTD_38 || mask_type == DIFFWTD_38_INV); 34 const __m128i x0 = _mm_setzero_si128(); 35 const __m128i xAOM_BLEND_A64_MAX_ALPHA = 36 _mm_set1_epi16(AOM_BLEND_A64_MAX_ALPHA); 37 const int mask_base = 38; 38 const __m128i xmask_base = _mm_set1_epi16(mask_base); 39 const uint16_t *ssrc0 = CONVERT_TO_SHORTPTR(src0); 40 const uint16_t *ssrc1 = CONVERT_TO_SHORTPTR(src1); 41 if (bd == 8) { 42 if (mask_type == DIFFWTD_38_INV) { 43 for (int i = 0; i < h; ++i) { 44 for (int j = 0; j < w; j += 8) { 45 __m128i s0 = _mm_loadu_si128((const __m128i *)&ssrc0[j]); 46 __m128i s1 = _mm_loadu_si128((const __m128i *)&ssrc1[j]); 47 __m128i diff = _mm_srai_epi16(_mm_abs_epi16(_mm_sub_epi16(s0, s1)), 48 DIFF_FACTOR_LOG2); 49 __m128i m = _mm_min_epi16( 50 _mm_max_epi16(x0, _mm_add_epi16(diff, xmask_base)), 51 xAOM_BLEND_A64_MAX_ALPHA); 52 m = _mm_sub_epi16(xAOM_BLEND_A64_MAX_ALPHA, m); 53 m = _mm_packus_epi16(m, m); 54 _mm_storel_epi64((__m128i *)&mask[j], m); 55 } 56 ssrc0 += src0_stride; 57 ssrc1 += src1_stride; 58 mask += w; 59 } 60 } else { 61 for (int i = 0; i < h; ++i) { 62 for (int j = 0; j < w; j += 8) { 63 __m128i s0 = _mm_loadu_si128((const __m128i *)&ssrc0[j]); 64 __m128i s1 = _mm_loadu_si128((const __m128i *)&ssrc1[j]); 65 __m128i diff = _mm_srai_epi16(_mm_abs_epi16(_mm_sub_epi16(s0, s1)), 66 DIFF_FACTOR_LOG2); 67 __m128i m = _mm_min_epi16( 68 _mm_max_epi16(x0, _mm_add_epi16(diff, xmask_base)), 69 xAOM_BLEND_A64_MAX_ALPHA); 70 m = _mm_packus_epi16(m, m); 71 _mm_storel_epi64((__m128i *)&mask[j], m); 72 } 73 ssrc0 += src0_stride; 74 ssrc1 += src1_stride; 75 mask += w; 76 } 77 } 78 } else { 79 const __m128i xshift = _mm_set1_epi64x(bd - 8 + DIFF_FACTOR_LOG2); 80 if (mask_type == DIFFWTD_38_INV) { 81 for (int i = 0; i < h; ++i) { 82 for (int j = 0; j < w; j += 8) { 83 __m128i s0 = _mm_loadu_si128((const __m128i *)&ssrc0[j]); 84 __m128i s1 = _mm_loadu_si128((const __m128i *)&ssrc1[j]); 85 __m128i diff = 86 _mm_sra_epi16(_mm_abs_epi16(_mm_sub_epi16(s0, s1)), xshift); 87 __m128i m = _mm_min_epi16( 88 _mm_max_epi16(x0, _mm_add_epi16(diff, xmask_base)), 89 xAOM_BLEND_A64_MAX_ALPHA); 90 m = _mm_sub_epi16(xAOM_BLEND_A64_MAX_ALPHA, m); 91 m = _mm_packus_epi16(m, m); 92 _mm_storel_epi64((__m128i *)&mask[j], m); 93 } 94 ssrc0 += src0_stride; 95 ssrc1 += src1_stride; 96 mask += w; 97 } 98 } else { 99 for (int i = 0; i < h; ++i) { 100 for (int j = 0; j < w; j += 8) { 101 __m128i s0 = _mm_loadu_si128((const __m128i *)&ssrc0[j]); 102 __m128i s1 = _mm_loadu_si128((const __m128i *)&ssrc1[j]); 103 __m128i diff = 104 _mm_sra_epi16(_mm_abs_epi16(_mm_sub_epi16(s0, s1)), xshift); 105 __m128i m = _mm_min_epi16( 106 _mm_max_epi16(x0, _mm_add_epi16(diff, xmask_base)), 107 xAOM_BLEND_A64_MAX_ALPHA); 108 m = _mm_packus_epi16(m, m); 109 _mm_storel_epi64((__m128i *)&mask[j], m); 110 } 111 ssrc0 += src0_stride; 112 ssrc1 += src1_stride; 113 mask += w; 114 } 115 } 116 } 117 } 118 } 119 120 #endif // CONFIG_AV1_HIGHBITDEPTH