jidctint-avx2.asm (17137B)
1 ; 2 ; jidctint.asm - accurate integer IDCT (64-bit AVX2) 3 ; 4 ; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB 5 ; Copyright (C) 2009, 2016, 2018, 2020, 2024, D. R. Commander. 6 ; Copyright (C) 2018, Matthias Räncker. 7 ; 8 ; Based on the x86 SIMD extension for IJG JPEG library 9 ; Copyright (C) 1999-2006, MIYASAKA Masaru. 10 ; For conditions of distribution and use, see copyright notice in jsimdext.inc 11 ; 12 ; This file should be assembled with NASM (Netwide Assembler) or Yasm. 13 ; 14 ; This file contains a slower but more accurate integer implementation of the 15 ; inverse DCT (Discrete Cosine Transform). The following code is based 16 ; directly on the IJG's original jidctint.c; see the jidctint.c for 17 ; more details. 18 19 %include "jsimdext.inc" 20 %include "jdct.inc" 21 22 ; -------------------------------------------------------------------------- 23 24 %define CONST_BITS 13 25 %define PASS1_BITS 2 26 27 %define DESCALE_P1 (CONST_BITS - PASS1_BITS) 28 %define DESCALE_P2 (CONST_BITS + PASS1_BITS + 3) 29 30 %if CONST_BITS == 13 31 F_0_298 equ 2446 ; FIX(0.298631336) 32 F_0_390 equ 3196 ; FIX(0.390180644) 33 F_0_541 equ 4433 ; FIX(0.541196100) 34 F_0_765 equ 6270 ; FIX(0.765366865) 35 F_0_899 equ 7373 ; FIX(0.899976223) 36 F_1_175 equ 9633 ; FIX(1.175875602) 37 F_1_501 equ 12299 ; FIX(1.501321110) 38 F_1_847 equ 15137 ; FIX(1.847759065) 39 F_1_961 equ 16069 ; FIX(1.961570560) 40 F_2_053 equ 16819 ; FIX(2.053119869) 41 F_2_562 equ 20995 ; FIX(2.562915447) 42 F_3_072 equ 25172 ; FIX(3.072711026) 43 %else 44 ; NASM cannot do compile-time arithmetic on floating-point constants. 45 %define DESCALE(x, n) (((x) + (1 << ((n) - 1))) >> (n)) 46 F_0_298 equ DESCALE( 320652955, 30 - CONST_BITS) ; FIX(0.298631336) 47 F_0_390 equ DESCALE( 418953276, 30 - CONST_BITS) ; FIX(0.390180644) 48 F_0_541 equ DESCALE( 581104887, 30 - CONST_BITS) ; FIX(0.541196100) 49 F_0_765 equ DESCALE( 821806413, 30 - CONST_BITS) ; FIX(0.765366865) 50 F_0_899 equ DESCALE( 966342111, 30 - CONST_BITS) ; FIX(0.899976223) 51 F_1_175 equ DESCALE(1262586813, 30 - CONST_BITS) ; FIX(1.175875602) 52 F_1_501 equ DESCALE(1612031267, 30 - CONST_BITS) ; FIX(1.501321110) 53 F_1_847 equ DESCALE(1984016188, 30 - CONST_BITS) ; FIX(1.847759065) 54 F_1_961 equ DESCALE(2106220350, 30 - CONST_BITS) ; FIX(1.961570560) 55 F_2_053 equ DESCALE(2204520673, 30 - CONST_BITS) ; FIX(2.053119869) 56 F_2_562 equ DESCALE(2751909506, 30 - CONST_BITS) ; FIX(2.562915447) 57 F_3_072 equ DESCALE(3299298341, 30 - CONST_BITS) ; FIX(3.072711026) 58 %endif 59 60 ; -------------------------------------------------------------------------- 61 ; In-place 8x8x16-bit inverse matrix transpose using AVX2 instructions 62 ; %1-%4: Input/output registers 63 ; %5-%8: Temp registers 64 65 %macro DOTRANSPOSE 8 66 ; %5=(00 10 20 30 40 50 60 70 01 11 21 31 41 51 61 71) 67 ; %6=(03 13 23 33 43 53 63 73 02 12 22 32 42 52 62 72) 68 ; %7=(04 14 24 34 44 54 64 74 05 15 25 35 45 55 65 75) 69 ; %8=(07 17 27 37 47 57 67 77 06 16 26 36 46 56 66 76) 70 71 vpermq %5, %1, 0xD8 72 vpermq %6, %2, 0x72 73 vpermq %7, %3, 0xD8 74 vpermq %8, %4, 0x72 75 ; transpose coefficients(phase 1) 76 ; %5=(00 10 20 30 01 11 21 31 40 50 60 70 41 51 61 71) 77 ; %6=(02 12 22 32 03 13 23 33 42 52 62 72 43 53 63 73) 78 ; %7=(04 14 24 34 05 15 25 35 44 54 64 74 45 55 65 75) 79 ; %8=(06 16 26 36 07 17 27 37 46 56 66 76 47 57 67 77) 80 81 vpunpcklwd %1, %5, %6 82 vpunpckhwd %2, %5, %6 83 vpunpcklwd %3, %7, %8 84 vpunpckhwd %4, %7, %8 85 ; transpose coefficients(phase 2) 86 ; %1=(00 02 10 12 20 22 30 32 40 42 50 52 60 62 70 72) 87 ; %2=(01 03 11 13 21 23 31 33 41 43 51 53 61 63 71 73) 88 ; %3=(04 06 14 16 24 26 34 36 44 46 54 56 64 66 74 76) 89 ; %4=(05 07 15 17 25 27 35 37 45 47 55 57 65 67 75 77) 90 91 vpunpcklwd %5, %1, %2 92 vpunpcklwd %6, %3, %4 93 vpunpckhwd %7, %1, %2 94 vpunpckhwd %8, %3, %4 95 ; transpose coefficients(phase 3) 96 ; %5=(00 01 02 03 10 11 12 13 40 41 42 43 50 51 52 53) 97 ; %6=(04 05 06 07 14 15 16 17 44 45 46 47 54 55 56 57) 98 ; %7=(20 21 22 23 30 31 32 33 60 61 62 63 70 71 72 73) 99 ; %8=(24 25 26 27 34 35 36 37 64 65 66 67 74 75 76 77) 100 101 vpunpcklqdq %1, %5, %6 102 vpunpckhqdq %2, %5, %6 103 vpunpcklqdq %3, %7, %8 104 vpunpckhqdq %4, %7, %8 105 ; transpose coefficients(phase 4) 106 ; %1=(00 01 02 03 04 05 06 07 40 41 42 43 44 45 46 47) 107 ; %2=(10 11 12 13 14 15 16 17 50 51 52 53 54 55 56 57) 108 ; %3=(20 21 22 23 24 25 26 27 60 61 62 63 64 65 66 67) 109 ; %4=(30 31 32 33 34 35 36 37 70 71 72 73 74 75 76 77) 110 %endmacro 111 112 ; -------------------------------------------------------------------------- 113 ; In-place 8x8x16-bit accurate integer inverse DCT using AVX2 instructions 114 ; %1-%4: Input/output registers 115 ; %5-%12: Temp registers 116 ; %9: Pass (1 or 2) 117 118 %macro DODCT 13 119 ; -- Even part 120 121 ; (Original) 122 ; z1 = (z2 + z3) * 0.541196100; 123 ; tmp2 = z1 + z3 * -1.847759065; 124 ; tmp3 = z1 + z2 * 0.765366865; 125 ; 126 ; (This implementation) 127 ; tmp2 = z2 * 0.541196100 + z3 * (0.541196100 - 1.847759065); 128 ; tmp3 = z2 * (0.541196100 + 0.765366865) + z3 * 0.541196100; 129 130 vperm2i128 %6, %3, %3, 0x01 ; %6=in6_2 131 vpunpcklwd %5, %3, %6 ; %5=in26_62L 132 vpunpckhwd %6, %3, %6 ; %6=in26_62H 133 vpmaddwd %5, %5, [rel PW_F130_F054_MF130_F054] ; %5=tmp3_2L 134 vpmaddwd %6, %6, [rel PW_F130_F054_MF130_F054] ; %6=tmp3_2H 135 136 vperm2i128 %7, %1, %1, 0x01 ; %7=in4_0 137 vpsignw %1, %1, [rel PW_1_NEG1] 138 vpaddw %7, %7, %1 ; %7=(in0+in4)_(in0-in4) 139 140 vpxor %1, %1, %1 141 vpunpcklwd %8, %1, %7 ; %8=tmp0_1L 142 vpunpckhwd %1, %1, %7 ; %1=tmp0_1H 143 vpsrad %8, %8, (16-CONST_BITS) ; vpsrad %8,16 & vpslld %8,CONST_BITS 144 vpsrad %1, %1, (16-CONST_BITS) ; vpsrad %1,16 & vpslld %1,CONST_BITS 145 146 vpsubd %11, %8, %5 ; %11=tmp0_1L-tmp3_2L=tmp13_12L 147 vpaddd %9, %8, %5 ; %9=tmp0_1L+tmp3_2L=tmp10_11L 148 vpsubd %12, %1, %6 ; %12=tmp0_1H-tmp3_2H=tmp13_12H 149 vpaddd %10, %1, %6 ; %10=tmp0_1H+tmp3_2H=tmp10_11H 150 151 ; -- Odd part 152 153 vpaddw %1, %4, %2 ; %1=in7_5+in3_1=z3_4 154 155 ; (Original) 156 ; z5 = (z3 + z4) * 1.175875602; 157 ; z3 = z3 * -1.961570560; z4 = z4 * -0.390180644; 158 ; z3 += z5; z4 += z5; 159 ; 160 ; (This implementation) 161 ; z3 = z3 * (1.175875602 - 1.961570560) + z4 * 1.175875602; 162 ; z4 = z3 * 1.175875602 + z4 * (1.175875602 - 0.390180644); 163 164 vperm2i128 %8, %1, %1, 0x01 ; %8=z4_3 165 vpunpcklwd %7, %1, %8 ; %7=z34_43L 166 vpunpckhwd %8, %1, %8 ; %8=z34_43H 167 vpmaddwd %7, %7, [rel PW_MF078_F117_F078_F117] ; %7=z3_4L 168 vpmaddwd %8, %8, [rel PW_MF078_F117_F078_F117] ; %8=z3_4H 169 170 ; (Original) 171 ; z1 = tmp0 + tmp3; z2 = tmp1 + tmp2; 172 ; tmp0 = tmp0 * 0.298631336; tmp1 = tmp1 * 2.053119869; 173 ; tmp2 = tmp2 * 3.072711026; tmp3 = tmp3 * 1.501321110; 174 ; z1 = z1 * -0.899976223; z2 = z2 * -2.562915447; 175 ; tmp0 += z1 + z3; tmp1 += z2 + z4; 176 ; tmp2 += z2 + z3; tmp3 += z1 + z4; 177 ; 178 ; (This implementation) 179 ; tmp0 = tmp0 * (0.298631336 - 0.899976223) + tmp3 * -0.899976223; 180 ; tmp1 = tmp1 * (2.053119869 - 2.562915447) + tmp2 * -2.562915447; 181 ; tmp2 = tmp1 * -2.562915447 + tmp2 * (3.072711026 - 2.562915447); 182 ; tmp3 = tmp0 * -0.899976223 + tmp3 * (1.501321110 - 0.899976223); 183 ; tmp0 += z3; tmp1 += z4; 184 ; tmp2 += z3; tmp3 += z4; 185 186 vperm2i128 %2, %2, %2, 0x01 ; %2=in1_3 187 vpunpcklwd %3, %4, %2 ; %3=in71_53L 188 vpunpckhwd %4, %4, %2 ; %4=in71_53H 189 190 vpmaddwd %5, %3, [rel PW_MF060_MF089_MF050_MF256] ; %5=tmp0_1L 191 vpmaddwd %6, %4, [rel PW_MF060_MF089_MF050_MF256] ; %6=tmp0_1H 192 vpaddd %5, %5, %7 ; %5=tmp0_1L+z3_4L=tmp0_1L 193 vpaddd %6, %6, %8 ; %6=tmp0_1H+z3_4H=tmp0_1H 194 195 vpmaddwd %3, %3, [rel PW_MF089_F060_MF256_F050] ; %3=tmp3_2L 196 vpmaddwd %4, %4, [rel PW_MF089_F060_MF256_F050] ; %4=tmp3_2H 197 vperm2i128 %7, %7, %7, 0x01 ; %7=z4_3L 198 vperm2i128 %8, %8, %8, 0x01 ; %8=z4_3H 199 vpaddd %7, %3, %7 ; %7=tmp3_2L+z4_3L=tmp3_2L 200 vpaddd %8, %4, %8 ; %8=tmp3_2H+z4_3H=tmp3_2H 201 202 ; -- Final output stage 203 204 vpaddd %1, %9, %7 ; %1=tmp10_11L+tmp3_2L=data0_1L 205 vpaddd %2, %10, %8 ; %2=tmp10_11H+tmp3_2H=data0_1H 206 vpaddd %1, %1, [rel PD_DESCALE_P %+ %13] 207 vpaddd %2, %2, [rel PD_DESCALE_P %+ %13] 208 vpsrad %1, %1, DESCALE_P %+ %13 209 vpsrad %2, %2, DESCALE_P %+ %13 210 vpackssdw %1, %1, %2 ; %1=data0_1 211 212 vpsubd %3, %9, %7 ; %3=tmp10_11L-tmp3_2L=data7_6L 213 vpsubd %4, %10, %8 ; %4=tmp10_11H-tmp3_2H=data7_6H 214 vpaddd %3, %3, [rel PD_DESCALE_P %+ %13] 215 vpaddd %4, %4, [rel PD_DESCALE_P %+ %13] 216 vpsrad %3, %3, DESCALE_P %+ %13 217 vpsrad %4, %4, DESCALE_P %+ %13 218 vpackssdw %4, %3, %4 ; %4=data7_6 219 220 vpaddd %7, %11, %5 ; %7=tmp13_12L+tmp0_1L=data3_2L 221 vpaddd %8, %12, %6 ; %8=tmp13_12H+tmp0_1H=data3_2H 222 vpaddd %7, %7, [rel PD_DESCALE_P %+ %13] 223 vpaddd %8, %8, [rel PD_DESCALE_P %+ %13] 224 vpsrad %7, %7, DESCALE_P %+ %13 225 vpsrad %8, %8, DESCALE_P %+ %13 226 vpackssdw %2, %7, %8 ; %2=data3_2 227 228 vpsubd %7, %11, %5 ; %7=tmp13_12L-tmp0_1L=data4_5L 229 vpsubd %8, %12, %6 ; %8=tmp13_12H-tmp0_1H=data4_5H 230 vpaddd %7, %7, [rel PD_DESCALE_P %+ %13] 231 vpaddd %8, %8, [rel PD_DESCALE_P %+ %13] 232 vpsrad %7, %7, DESCALE_P %+ %13 233 vpsrad %8, %8, DESCALE_P %+ %13 234 vpackssdw %3, %7, %8 ; %3=data4_5 235 %endmacro 236 237 ; -------------------------------------------------------------------------- 238 SECTION SEG_CONST 239 240 ALIGNZ 32 241 GLOBAL_DATA(jconst_idct_islow_avx2) 242 243 EXTN(jconst_idct_islow_avx2): 244 245 PW_F130_F054_MF130_F054 times 4 dw (F_0_541 + F_0_765), F_0_541 246 times 4 dw (F_0_541 - F_1_847), F_0_541 247 PW_MF078_F117_F078_F117 times 4 dw (F_1_175 - F_1_961), F_1_175 248 times 4 dw (F_1_175 - F_0_390), F_1_175 249 PW_MF060_MF089_MF050_MF256 times 4 dw (F_0_298 - F_0_899), -F_0_899 250 times 4 dw (F_2_053 - F_2_562), -F_2_562 251 PW_MF089_F060_MF256_F050 times 4 dw -F_0_899, (F_1_501 - F_0_899) 252 times 4 dw -F_2_562, (F_3_072 - F_2_562) 253 PD_DESCALE_P1 times 8 dd 1 << (DESCALE_P1 - 1) 254 PD_DESCALE_P2 times 8 dd 1 << (DESCALE_P2 - 1) 255 PB_CENTERJSAMP times 32 db CENTERJSAMPLE 256 PW_1_NEG1 times 8 dw 1 257 times 8 dw -1 258 259 ALIGNZ 32 260 261 ; -------------------------------------------------------------------------- 262 SECTION SEG_TEXT 263 BITS 64 264 ; 265 ; Perform dequantization and inverse DCT on one block of coefficients. 266 ; 267 ; GLOBAL(void) 268 ; jsimd_idct_islow_avx2(void *dct_table, JCOEFPTR coef_block, 269 ; JSAMPARRAY output_buf, JDIMENSION output_col) 270 ; 271 272 ; r10 = jpeg_component_info *compptr 273 ; r11 = JCOEFPTR coef_block 274 ; r12 = JSAMPARRAY output_buf 275 ; r13d = JDIMENSION output_col 276 277 align 32 278 GLOBAL_FUNCTION(jsimd_idct_islow_avx2) 279 280 EXTN(jsimd_idct_islow_avx2): 281 ENDBR64 282 push rbp 283 mov rbp, rsp ; rbp = aligned rbp 284 PUSH_XMM 4 285 COLLECT_ARGS 4 286 287 ; ---- Pass 1: process columns. 288 289 %ifndef NO_ZERO_COLUMN_TEST_ISLOW_AVX2 290 mov eax, dword [DWBLOCK(1,0,r11,SIZEOF_JCOEF)] 291 or eax, dword [DWBLOCK(2,0,r11,SIZEOF_JCOEF)] 292 jnz near .columnDCT 293 294 movdqa xmm0, XMMWORD [XMMBLOCK(1,0,r11,SIZEOF_JCOEF)] 295 movdqa xmm1, XMMWORD [XMMBLOCK(2,0,r11,SIZEOF_JCOEF)] 296 vpor xmm0, xmm0, XMMWORD [XMMBLOCK(3,0,r11,SIZEOF_JCOEF)] 297 vpor xmm1, xmm1, XMMWORD [XMMBLOCK(4,0,r11,SIZEOF_JCOEF)] 298 vpor xmm0, xmm0, XMMWORD [XMMBLOCK(5,0,r11,SIZEOF_JCOEF)] 299 vpor xmm1, xmm1, XMMWORD [XMMBLOCK(6,0,r11,SIZEOF_JCOEF)] 300 vpor xmm0, xmm0, XMMWORD [XMMBLOCK(7,0,r11,SIZEOF_JCOEF)] 301 vpor xmm1, xmm1, xmm0 302 vpacksswb xmm1, xmm1, xmm1 303 vpacksswb xmm1, xmm1, xmm1 304 movd eax, xmm1 305 test rax, rax 306 jnz short .columnDCT 307 308 ; -- AC terms all zero 309 310 movdqa xmm5, XMMWORD [XMMBLOCK(0,0,r11,SIZEOF_JCOEF)] 311 vpmullw xmm5, xmm5, XMMWORD [XMMBLOCK(0,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 312 313 vpsllw xmm5, xmm5, PASS1_BITS 314 315 vpunpcklwd xmm4, xmm5, xmm5 ; xmm4=(00 00 01 01 02 02 03 03) 316 vpunpckhwd xmm5, xmm5, xmm5 ; xmm5=(04 04 05 05 06 06 07 07) 317 vinserti128 ymm4, ymm4, xmm5, 1 318 319 vpshufd ymm0, ymm4, 0x00 ; ymm0=col0_4=(00 00 00 00 00 00 00 00 04 04 04 04 04 04 04 04) 320 vpshufd ymm1, ymm4, 0x55 ; ymm1=col1_5=(01 01 01 01 01 01 01 01 05 05 05 05 05 05 05 05) 321 vpshufd ymm2, ymm4, 0xAA ; ymm2=col2_6=(02 02 02 02 02 02 02 02 06 06 06 06 06 06 06 06) 322 vpshufd ymm3, ymm4, 0xFF ; ymm3=col3_7=(03 03 03 03 03 03 03 03 07 07 07 07 07 07 07 07) 323 324 jmp near .column_end 325 %endif 326 .columnDCT: 327 328 vmovdqu ymm4, YMMWORD [YMMBLOCK(0,0,r11,SIZEOF_JCOEF)] ; ymm4=in0_1 329 vmovdqu ymm5, YMMWORD [YMMBLOCK(2,0,r11,SIZEOF_JCOEF)] ; ymm5=in2_3 330 vmovdqu ymm6, YMMWORD [YMMBLOCK(4,0,r11,SIZEOF_JCOEF)] ; ymm6=in4_5 331 vmovdqu ymm7, YMMWORD [YMMBLOCK(6,0,r11,SIZEOF_JCOEF)] ; ymm7=in6_7 332 vpmullw ymm4, ymm4, YMMWORD [YMMBLOCK(0,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 333 vpmullw ymm5, ymm5, YMMWORD [YMMBLOCK(2,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 334 vpmullw ymm6, ymm6, YMMWORD [YMMBLOCK(4,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 335 vpmullw ymm7, ymm7, YMMWORD [YMMBLOCK(6,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 336 337 vperm2i128 ymm0, ymm4, ymm6, 0x20 ; ymm0=in0_4 338 vperm2i128 ymm1, ymm5, ymm4, 0x31 ; ymm1=in3_1 339 vperm2i128 ymm2, ymm5, ymm7, 0x20 ; ymm2=in2_6 340 vperm2i128 ymm3, ymm7, ymm6, 0x31 ; ymm3=in7_5 341 342 DODCT ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7, ymm8, ymm9, ymm10, ymm11, 1 343 ; ymm0=data0_1, ymm1=data3_2, ymm2=data4_5, ymm3=data7_6 344 345 DOTRANSPOSE ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7 346 ; ymm0=data0_4, ymm1=data1_5, ymm2=data2_6, ymm3=data3_7 347 348 .column_end: 349 350 ; -- Prefetch the next coefficient block 351 352 prefetchnta [r11 + DCTSIZE2*SIZEOF_JCOEF + 0*32] 353 prefetchnta [r11 + DCTSIZE2*SIZEOF_JCOEF + 1*32] 354 prefetchnta [r11 + DCTSIZE2*SIZEOF_JCOEF + 2*32] 355 prefetchnta [r11 + DCTSIZE2*SIZEOF_JCOEF + 3*32] 356 357 ; ---- Pass 2: process rows. 358 359 vperm2i128 ymm4, ymm3, ymm1, 0x31 ; ymm3=in7_5 360 vperm2i128 ymm1, ymm3, ymm1, 0x20 ; ymm1=in3_1 361 362 DODCT ymm0, ymm1, ymm2, ymm4, ymm3, ymm5, ymm6, ymm7, ymm8, ymm9, ymm10, ymm11, 2 363 ; ymm0=data0_1, ymm1=data3_2, ymm2=data4_5, ymm4=data7_6 364 365 DOTRANSPOSE ymm0, ymm1, ymm2, ymm4, ymm3, ymm5, ymm6, ymm7 366 ; ymm0=data0_4, ymm1=data1_5, ymm2=data2_6, ymm4=data3_7 367 368 vpacksswb ymm0, ymm0, ymm1 ; ymm0=data01_45 369 vpacksswb ymm1, ymm2, ymm4 ; ymm1=data23_67 370 vpaddb ymm0, ymm0, [rel PB_CENTERJSAMP] 371 vpaddb ymm1, ymm1, [rel PB_CENTERJSAMP] 372 373 vextracti128 xmm6, ymm1, 1 ; xmm3=data67 374 vextracti128 xmm4, ymm0, 1 ; xmm2=data45 375 vextracti128 xmm2, ymm1, 0 ; xmm1=data23 376 vextracti128 xmm0, ymm0, 0 ; xmm0=data01 377 378 vpshufd xmm1, xmm0, 0x4E ; xmm1=(10 11 12 13 14 15 16 17 00 01 02 03 04 05 06 07) 379 vpshufd xmm3, xmm2, 0x4E ; xmm3=(30 31 32 33 34 35 36 37 20 21 22 23 24 25 26 27) 380 vpshufd xmm5, xmm4, 0x4E ; xmm5=(50 51 52 53 54 55 56 57 40 41 42 43 44 45 46 47) 381 vpshufd xmm7, xmm6, 0x4E ; xmm7=(70 71 72 73 74 75 76 77 60 61 62 63 64 65 66 67) 382 383 vzeroupper 384 385 mov eax, r13d 386 387 mov rdxp, JSAMPROW [r12+0*SIZEOF_JSAMPROW] ; (JSAMPLE *) 388 mov rsip, JSAMPROW [r12+1*SIZEOF_JSAMPROW] ; (JSAMPLE *) 389 movq XMM_MMWORD [rdx+rax*SIZEOF_JSAMPLE], xmm0 390 movq XMM_MMWORD [rsi+rax*SIZEOF_JSAMPLE], xmm1 391 392 mov rdxp, JSAMPROW [r12+2*SIZEOF_JSAMPROW] ; (JSAMPLE *) 393 mov rsip, JSAMPROW [r12+3*SIZEOF_JSAMPROW] ; (JSAMPLE *) 394 movq XMM_MMWORD [rdx+rax*SIZEOF_JSAMPLE], xmm2 395 movq XMM_MMWORD [rsi+rax*SIZEOF_JSAMPLE], xmm3 396 397 mov rdxp, JSAMPROW [r12+4*SIZEOF_JSAMPROW] ; (JSAMPLE *) 398 mov rsip, JSAMPROW [r12+5*SIZEOF_JSAMPROW] ; (JSAMPLE *) 399 movq XMM_MMWORD [rdx+rax*SIZEOF_JSAMPLE], xmm4 400 movq XMM_MMWORD [rsi+rax*SIZEOF_JSAMPLE], xmm5 401 402 mov rdxp, JSAMPROW [r12+6*SIZEOF_JSAMPROW] ; (JSAMPLE *) 403 mov rsip, JSAMPROW [r12+7*SIZEOF_JSAMPROW] ; (JSAMPLE *) 404 movq XMM_MMWORD [rdx+rax*SIZEOF_JSAMPLE], xmm6 405 movq XMM_MMWORD [rsi+rax*SIZEOF_JSAMPLE], xmm7 406 407 UNCOLLECT_ARGS 4 408 POP_XMM 4 409 pop rbp 410 ret 411 412 ; For some reason, the OS X linker does not honor the request to align the 413 ; segment unless we do this. 414 align 32