jfdctint-avx2.asm (12095B)
1 ; 2 ; jfdctint.asm - accurate integer FDCT (64-bit AVX2) 3 ; 4 ; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB 5 ; Copyright (C) 2009, 2016, 2018, 2020, 2024, D. R. Commander. 6 ; 7 ; Based on the x86 SIMD extension for IJG JPEG library 8 ; Copyright (C) 1999-2006, MIYASAKA Masaru. 9 ; For conditions of distribution and use, see copyright notice in jsimdext.inc 10 ; 11 ; This file should be assembled with NASM (Netwide Assembler) or Yasm. 12 ; 13 ; This file contains a slower but more accurate integer implementation of the 14 ; forward DCT (Discrete Cosine Transform). The following code is based 15 ; directly on the IJG's original jfdctint.c; see the jfdctint.c for 16 ; more details. 17 18 %include "jsimdext.inc" 19 %include "jdct.inc" 20 21 ; -------------------------------------------------------------------------- 22 23 %define CONST_BITS 13 24 %define PASS1_BITS 2 25 26 %define DESCALE_P1 (CONST_BITS - PASS1_BITS) 27 %define DESCALE_P2 (CONST_BITS + PASS1_BITS) 28 29 %if CONST_BITS == 13 30 F_0_298 equ 2446 ; FIX(0.298631336) 31 F_0_390 equ 3196 ; FIX(0.390180644) 32 F_0_541 equ 4433 ; FIX(0.541196100) 33 F_0_765 equ 6270 ; FIX(0.765366865) 34 F_0_899 equ 7373 ; FIX(0.899976223) 35 F_1_175 equ 9633 ; FIX(1.175875602) 36 F_1_501 equ 12299 ; FIX(1.501321110) 37 F_1_847 equ 15137 ; FIX(1.847759065) 38 F_1_961 equ 16069 ; FIX(1.961570560) 39 F_2_053 equ 16819 ; FIX(2.053119869) 40 F_2_562 equ 20995 ; FIX(2.562915447) 41 F_3_072 equ 25172 ; FIX(3.072711026) 42 %else 43 ; NASM cannot do compile-time arithmetic on floating-point constants. 44 %define DESCALE(x, n) (((x) + (1 << ((n) - 1))) >> (n)) 45 F_0_298 equ DESCALE( 320652955, 30 - CONST_BITS) ; FIX(0.298631336) 46 F_0_390 equ DESCALE( 418953276, 30 - CONST_BITS) ; FIX(0.390180644) 47 F_0_541 equ DESCALE( 581104887, 30 - CONST_BITS) ; FIX(0.541196100) 48 F_0_765 equ DESCALE( 821806413, 30 - CONST_BITS) ; FIX(0.765366865) 49 F_0_899 equ DESCALE( 966342111, 30 - CONST_BITS) ; FIX(0.899976223) 50 F_1_175 equ DESCALE(1262586813, 30 - CONST_BITS) ; FIX(1.175875602) 51 F_1_501 equ DESCALE(1612031267, 30 - CONST_BITS) ; FIX(1.501321110) 52 F_1_847 equ DESCALE(1984016188, 30 - CONST_BITS) ; FIX(1.847759065) 53 F_1_961 equ DESCALE(2106220350, 30 - CONST_BITS) ; FIX(1.961570560) 54 F_2_053 equ DESCALE(2204520673, 30 - CONST_BITS) ; FIX(2.053119869) 55 F_2_562 equ DESCALE(2751909506, 30 - CONST_BITS) ; FIX(2.562915447) 56 F_3_072 equ DESCALE(3299298341, 30 - CONST_BITS) ; FIX(3.072711026) 57 %endif 58 59 ; -------------------------------------------------------------------------- 60 ; In-place 8x8x16-bit matrix transpose using AVX2 instructions 61 ; %1-%4: Input/output registers 62 ; %5-%8: Temp registers 63 64 %macro DOTRANSPOSE 8 65 ; %1=(00 01 02 03 04 05 06 07 40 41 42 43 44 45 46 47) 66 ; %2=(10 11 12 13 14 15 16 17 50 51 52 53 54 55 56 57) 67 ; %3=(20 21 22 23 24 25 26 27 60 61 62 63 64 65 66 67) 68 ; %4=(30 31 32 33 34 35 36 37 70 71 72 73 74 75 76 77) 69 70 vpunpcklwd %5, %1, %2 71 vpunpckhwd %6, %1, %2 72 vpunpcklwd %7, %3, %4 73 vpunpckhwd %8, %3, %4 74 ; transpose coefficients(phase 1) 75 ; %5=(00 10 01 11 02 12 03 13 40 50 41 51 42 52 43 53) 76 ; %6=(04 14 05 15 06 16 07 17 44 54 45 55 46 56 47 57) 77 ; %7=(20 30 21 31 22 32 23 33 60 70 61 71 62 72 63 73) 78 ; %8=(24 34 25 35 26 36 27 37 64 74 65 75 66 76 67 77) 79 80 vpunpckldq %1, %5, %7 81 vpunpckhdq %2, %5, %7 82 vpunpckldq %3, %6, %8 83 vpunpckhdq %4, %6, %8 84 ; transpose coefficients(phase 2) 85 ; %1=(00 10 20 30 01 11 21 31 40 50 60 70 41 51 61 71) 86 ; %2=(02 12 22 32 03 13 23 33 42 52 62 72 43 53 63 73) 87 ; %3=(04 14 24 34 05 15 25 35 44 54 64 74 45 55 65 75) 88 ; %4=(06 16 26 36 07 17 27 37 46 56 66 76 47 57 67 77) 89 90 vpermq %1, %1, 0x8D 91 vpermq %2, %2, 0x8D 92 vpermq %3, %3, 0xD8 93 vpermq %4, %4, 0xD8 94 ; transpose coefficients(phase 3) 95 ; %1=(01 11 21 31 41 51 61 71 00 10 20 30 40 50 60 70) 96 ; %2=(03 13 23 33 43 53 63 73 02 12 22 32 42 52 62 72) 97 ; %3=(04 14 24 34 44 54 64 74 05 15 25 35 45 55 65 75) 98 ; %4=(06 16 26 36 46 56 66 76 07 17 27 37 47 57 67 77) 99 %endmacro 100 101 ; -------------------------------------------------------------------------- 102 ; In-place 8x8x16-bit accurate integer forward DCT using AVX2 instructions 103 ; %1-%4: Input/output registers 104 ; %5-%8: Temp registers 105 ; %9: Pass (1 or 2) 106 107 %macro DODCT 9 108 vpsubw %5, %1, %4 ; %5=data1_0-data6_7=tmp6_7 109 vpaddw %6, %1, %4 ; %6=data1_0+data6_7=tmp1_0 110 vpaddw %7, %2, %3 ; %7=data3_2+data4_5=tmp3_2 111 vpsubw %8, %2, %3 ; %8=data3_2-data4_5=tmp4_5 112 113 ; -- Even part 114 115 vperm2i128 %6, %6, %6, 0x01 ; %6=tmp0_1 116 vpaddw %1, %6, %7 ; %1=tmp0_1+tmp3_2=tmp10_11 117 vpsubw %6, %6, %7 ; %6=tmp0_1-tmp3_2=tmp13_12 118 119 vperm2i128 %7, %1, %1, 0x01 ; %7=tmp11_10 120 vpsignw %1, %1, [rel PW_1_NEG1] ; %1=tmp10_neg11 121 vpaddw %7, %7, %1 ; %7=(tmp10+tmp11)_(tmp10-tmp11) 122 %if %9 == 1 123 vpsllw %1, %7, PASS1_BITS ; %1=data0_4 124 %else 125 vpaddw %7, %7, [rel PW_DESCALE_P2X] 126 vpsraw %1, %7, PASS1_BITS ; %1=data0_4 127 %endif 128 129 ; (Original) 130 ; z1 = (tmp12 + tmp13) * 0.541196100; 131 ; data2 = z1 + tmp13 * 0.765366865; 132 ; data6 = z1 + tmp12 * -1.847759065; 133 ; 134 ; (This implementation) 135 ; data2 = tmp13 * (0.541196100 + 0.765366865) + tmp12 * 0.541196100; 136 ; data6 = tmp13 * 0.541196100 + tmp12 * (0.541196100 - 1.847759065); 137 138 vperm2i128 %7, %6, %6, 0x01 ; %7=tmp12_13 139 vpunpcklwd %2, %6, %7 140 vpunpckhwd %6, %6, %7 141 vpmaddwd %2, %2, [rel PW_F130_F054_MF130_F054] ; %2=data2_6L 142 vpmaddwd %6, %6, [rel PW_F130_F054_MF130_F054] ; %6=data2_6H 143 144 vpaddd %2, %2, [rel PD_DESCALE_P %+ %9] 145 vpaddd %6, %6, [rel PD_DESCALE_P %+ %9] 146 vpsrad %2, %2, DESCALE_P %+ %9 147 vpsrad %6, %6, DESCALE_P %+ %9 148 149 vpackssdw %3, %2, %6 ; %6=data2_6 150 151 ; -- Odd part 152 153 vpaddw %7, %8, %5 ; %7=tmp4_5+tmp6_7=z3_4 154 155 ; (Original) 156 ; z5 = (z3 + z4) * 1.175875602; 157 ; z3 = z3 * -1.961570560; z4 = z4 * -0.390180644; 158 ; z3 += z5; z4 += z5; 159 ; 160 ; (This implementation) 161 ; z3 = z3 * (1.175875602 - 1.961570560) + z4 * 1.175875602; 162 ; z4 = z3 * 1.175875602 + z4 * (1.175875602 - 0.390180644); 163 164 vperm2i128 %2, %7, %7, 0x01 ; %2=z4_3 165 vpunpcklwd %6, %7, %2 166 vpunpckhwd %7, %7, %2 167 vpmaddwd %6, %6, [rel PW_MF078_F117_F078_F117] ; %6=z3_4L 168 vpmaddwd %7, %7, [rel PW_MF078_F117_F078_F117] ; %7=z3_4H 169 170 ; (Original) 171 ; z1 = tmp4 + tmp7; z2 = tmp5 + tmp6; 172 ; tmp4 = tmp4 * 0.298631336; tmp5 = tmp5 * 2.053119869; 173 ; tmp6 = tmp6 * 3.072711026; tmp7 = tmp7 * 1.501321110; 174 ; z1 = z1 * -0.899976223; z2 = z2 * -2.562915447; 175 ; data7 = tmp4 + z1 + z3; data5 = tmp5 + z2 + z4; 176 ; data3 = tmp6 + z2 + z3; data1 = tmp7 + z1 + z4; 177 ; 178 ; (This implementation) 179 ; tmp4 = tmp4 * (0.298631336 - 0.899976223) + tmp7 * -0.899976223; 180 ; tmp5 = tmp5 * (2.053119869 - 2.562915447) + tmp6 * -2.562915447; 181 ; tmp6 = tmp5 * -2.562915447 + tmp6 * (3.072711026 - 2.562915447); 182 ; tmp7 = tmp4 * -0.899976223 + tmp7 * (1.501321110 - 0.899976223); 183 ; data7 = tmp4 + z3; data5 = tmp5 + z4; 184 ; data3 = tmp6 + z3; data1 = tmp7 + z4; 185 186 vperm2i128 %4, %5, %5, 0x01 ; %4=tmp7_6 187 vpunpcklwd %2, %8, %4 188 vpunpckhwd %4, %8, %4 189 vpmaddwd %2, %2, [rel PW_MF060_MF089_MF050_MF256] ; %2=tmp4_5L 190 vpmaddwd %4, %4, [rel PW_MF060_MF089_MF050_MF256] ; %4=tmp4_5H 191 192 vpaddd %2, %2, %6 ; %2=data7_5L 193 vpaddd %4, %4, %7 ; %4=data7_5H 194 195 vpaddd %2, %2, [rel PD_DESCALE_P %+ %9] 196 vpaddd %4, %4, [rel PD_DESCALE_P %+ %9] 197 vpsrad %2, %2, DESCALE_P %+ %9 198 vpsrad %4, %4, DESCALE_P %+ %9 199 200 vpackssdw %4, %2, %4 ; %4=data7_5 201 202 vperm2i128 %2, %8, %8, 0x01 ; %2=tmp5_4 203 vpunpcklwd %8, %5, %2 204 vpunpckhwd %5, %5, %2 205 vpmaddwd %8, %8, [rel PW_F050_MF256_F060_MF089] ; %8=tmp6_7L 206 vpmaddwd %5, %5, [rel PW_F050_MF256_F060_MF089] ; %5=tmp6_7H 207 208 vpaddd %8, %8, %6 ; %8=data3_1L 209 vpaddd %5, %5, %7 ; %5=data3_1H 210 211 vpaddd %8, %8, [rel PD_DESCALE_P %+ %9] 212 vpaddd %5, %5, [rel PD_DESCALE_P %+ %9] 213 vpsrad %8, %8, DESCALE_P %+ %9 214 vpsrad %5, %5, DESCALE_P %+ %9 215 216 vpackssdw %2, %8, %5 ; %2=data3_1 217 %endmacro 218 219 ; -------------------------------------------------------------------------- 220 SECTION SEG_CONST 221 222 ALIGNZ 32 223 GLOBAL_DATA(jconst_fdct_islow_avx2) 224 225 EXTN(jconst_fdct_islow_avx2): 226 227 PW_F130_F054_MF130_F054 times 4 dw (F_0_541 + F_0_765), F_0_541 228 times 4 dw (F_0_541 - F_1_847), F_0_541 229 PW_MF078_F117_F078_F117 times 4 dw (F_1_175 - F_1_961), F_1_175 230 times 4 dw (F_1_175 - F_0_390), F_1_175 231 PW_MF060_MF089_MF050_MF256 times 4 dw (F_0_298 - F_0_899), -F_0_899 232 times 4 dw (F_2_053 - F_2_562), -F_2_562 233 PW_F050_MF256_F060_MF089 times 4 dw (F_3_072 - F_2_562), -F_2_562 234 times 4 dw (F_1_501 - F_0_899), -F_0_899 235 PD_DESCALE_P1 times 8 dd 1 << (DESCALE_P1 - 1) 236 PD_DESCALE_P2 times 8 dd 1 << (DESCALE_P2 - 1) 237 PW_DESCALE_P2X times 16 dw 1 << (PASS1_BITS - 1) 238 PW_1_NEG1 times 8 dw 1 239 times 8 dw -1 240 241 ALIGNZ 32 242 243 ; -------------------------------------------------------------------------- 244 SECTION SEG_TEXT 245 BITS 64 246 ; 247 ; Perform the forward DCT on one block of samples. 248 ; 249 ; GLOBAL(void) 250 ; jsimd_fdct_islow_avx2(DCTELEM *data) 251 ; 252 253 ; r10 = DCTELEM *data 254 255 align 32 256 GLOBAL_FUNCTION(jsimd_fdct_islow_avx2) 257 258 EXTN(jsimd_fdct_islow_avx2): 259 ENDBR64 260 push rbp 261 mov rbp, rsp 262 COLLECT_ARGS 1 263 264 ; ---- Pass 1: process rows. 265 266 vmovdqu ymm4, YMMWORD [YMMBLOCK(0,0,r10,SIZEOF_DCTELEM)] 267 vmovdqu ymm5, YMMWORD [YMMBLOCK(2,0,r10,SIZEOF_DCTELEM)] 268 vmovdqu ymm6, YMMWORD [YMMBLOCK(4,0,r10,SIZEOF_DCTELEM)] 269 vmovdqu ymm7, YMMWORD [YMMBLOCK(6,0,r10,SIZEOF_DCTELEM)] 270 ; ymm4=(00 01 02 03 04 05 06 07 10 11 12 13 14 15 16 17) 271 ; ymm5=(20 21 22 23 24 25 26 27 30 31 32 33 34 35 36 37) 272 ; ymm6=(40 41 42 43 44 45 46 47 50 51 52 53 54 55 56 57) 273 ; ymm7=(60 61 62 63 64 65 66 67 70 71 72 73 74 75 76 77) 274 275 vperm2i128 ymm0, ymm4, ymm6, 0x20 276 vperm2i128 ymm1, ymm4, ymm6, 0x31 277 vperm2i128 ymm2, ymm5, ymm7, 0x20 278 vperm2i128 ymm3, ymm5, ymm7, 0x31 279 ; ymm0=(00 01 02 03 04 05 06 07 40 41 42 43 44 45 46 47) 280 ; ymm1=(10 11 12 13 14 15 16 17 50 51 52 53 54 55 56 57) 281 ; ymm2=(20 21 22 23 24 25 26 27 60 61 62 63 64 65 66 67) 282 ; ymm3=(30 31 32 33 34 35 36 37 70 71 72 73 74 75 76 77) 283 284 DOTRANSPOSE ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7 285 286 DODCT ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7, 1 287 ; ymm0=data0_4, ymm1=data3_1, ymm2=data2_6, ymm3=data7_5 288 289 ; ---- Pass 2: process columns. 290 291 vperm2i128 ymm4, ymm1, ymm3, 0x20 ; ymm4=data3_7 292 vperm2i128 ymm1, ymm1, ymm3, 0x31 ; ymm1=data1_5 293 294 DOTRANSPOSE ymm0, ymm1, ymm2, ymm4, ymm3, ymm5, ymm6, ymm7 295 296 DODCT ymm0, ymm1, ymm2, ymm4, ymm3, ymm5, ymm6, ymm7, 2 297 ; ymm0=data0_4, ymm1=data3_1, ymm2=data2_6, ymm4=data7_5 298 299 vperm2i128 ymm3, ymm0, ymm1, 0x30 ; ymm3=data0_1 300 vperm2i128 ymm5, ymm2, ymm1, 0x20 ; ymm5=data2_3 301 vperm2i128 ymm6, ymm0, ymm4, 0x31 ; ymm6=data4_5 302 vperm2i128 ymm7, ymm2, ymm4, 0x21 ; ymm7=data6_7 303 304 vmovdqu YMMWORD [YMMBLOCK(0,0,r10,SIZEOF_DCTELEM)], ymm3 305 vmovdqu YMMWORD [YMMBLOCK(2,0,r10,SIZEOF_DCTELEM)], ymm5 306 vmovdqu YMMWORD [YMMBLOCK(4,0,r10,SIZEOF_DCTELEM)], ymm6 307 vmovdqu YMMWORD [YMMBLOCK(6,0,r10,SIZEOF_DCTELEM)], ymm7 308 309 vzeroupper 310 UNCOLLECT_ARGS 1 311 pop rbp 312 ret 313 314 ; For some reason, the OS X linker does not honor the request to align the 315 ; segment unless we do this. 316 align 32