WasmOpIter.cpp (63819B)
1 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- 2 * vim: set ts=8 sts=2 et sw=2 tw=80: 3 * 4 * Copyright 2015 Mozilla Foundation 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 */ 18 19 #include "wasm/WasmOpIter.h" 20 21 #include "jit/AtomicOp.h" 22 23 using namespace js; 24 using namespace js::jit; 25 using namespace js::wasm; 26 27 #ifdef ENABLE_WASM_SIMD 28 # define WASM_SIMD_OP(code) return code 29 #else 30 # define WASM_SIMD_OP(code) break 31 #endif 32 33 #ifdef DEBUG 34 OpKind wasm::Classify(OpBytes op) { 35 switch (Op(op.b0)) { 36 case Op::Block: 37 return OpKind::Block; 38 case Op::Loop: 39 return OpKind::Loop; 40 case Op::Unreachable: 41 return OpKind::Unreachable; 42 case Op::Drop: 43 return OpKind::Drop; 44 case Op::I32Const: 45 return OpKind::I32Const; 46 case Op::I64Const: 47 return OpKind::I64Const; 48 case Op::F32Const: 49 return OpKind::F32Const; 50 case Op::F64Const: 51 return OpKind::F64Const; 52 case Op::Br: 53 return OpKind::Br; 54 case Op::BrIf: 55 return OpKind::BrIf; 56 case Op::BrTable: 57 return OpKind::BrTable; 58 case Op::Nop: 59 return OpKind::Nop; 60 case Op::I32Clz: 61 case Op::I32Ctz: 62 case Op::I32Popcnt: 63 case Op::I64Clz: 64 case Op::I64Ctz: 65 case Op::I64Popcnt: 66 case Op::F32Abs: 67 case Op::F32Neg: 68 case Op::F32Ceil: 69 case Op::F32Floor: 70 case Op::F32Trunc: 71 case Op::F32Nearest: 72 case Op::F32Sqrt: 73 case Op::F64Abs: 74 case Op::F64Neg: 75 case Op::F64Ceil: 76 case Op::F64Floor: 77 case Op::F64Trunc: 78 case Op::F64Nearest: 79 case Op::F64Sqrt: 80 return OpKind::Unary; 81 case Op::I32Add: 82 case Op::I32Sub: 83 case Op::I32Mul: 84 case Op::I32DivS: 85 case Op::I32DivU: 86 case Op::I32RemS: 87 case Op::I32RemU: 88 case Op::I32And: 89 case Op::I32Or: 90 case Op::I32Xor: 91 case Op::I32Shl: 92 case Op::I32ShrS: 93 case Op::I32ShrU: 94 case Op::I32Rotl: 95 case Op::I32Rotr: 96 case Op::I64Add: 97 case Op::I64Sub: 98 case Op::I64Mul: 99 case Op::I64DivS: 100 case Op::I64DivU: 101 case Op::I64RemS: 102 case Op::I64RemU: 103 case Op::I64And: 104 case Op::I64Or: 105 case Op::I64Xor: 106 case Op::I64Shl: 107 case Op::I64ShrS: 108 case Op::I64ShrU: 109 case Op::I64Rotl: 110 case Op::I64Rotr: 111 case Op::F32Add: 112 case Op::F32Sub: 113 case Op::F32Mul: 114 case Op::F32Div: 115 case Op::F32Min: 116 case Op::F32Max: 117 case Op::F32CopySign: 118 case Op::F64Add: 119 case Op::F64Sub: 120 case Op::F64Mul: 121 case Op::F64Div: 122 case Op::F64Min: 123 case Op::F64Max: 124 case Op::F64CopySign: 125 return OpKind::Binary; 126 case Op::I32Eq: 127 case Op::I32Ne: 128 case Op::I32LtS: 129 case Op::I32LtU: 130 case Op::I32LeS: 131 case Op::I32LeU: 132 case Op::I32GtS: 133 case Op::I32GtU: 134 case Op::I32GeS: 135 case Op::I32GeU: 136 case Op::I64Eq: 137 case Op::I64Ne: 138 case Op::I64LtS: 139 case Op::I64LtU: 140 case Op::I64LeS: 141 case Op::I64LeU: 142 case Op::I64GtS: 143 case Op::I64GtU: 144 case Op::I64GeS: 145 case Op::I64GeU: 146 case Op::F32Eq: 147 case Op::F32Ne: 148 case Op::F32Lt: 149 case Op::F32Le: 150 case Op::F32Gt: 151 case Op::F32Ge: 152 case Op::F64Eq: 153 case Op::F64Ne: 154 case Op::F64Lt: 155 case Op::F64Le: 156 case Op::F64Gt: 157 case Op::F64Ge: 158 return OpKind::Comparison; 159 case Op::I32Eqz: 160 case Op::I32WrapI64: 161 case Op::I32TruncF32S: 162 case Op::I32TruncF32U: 163 case Op::I32ReinterpretF32: 164 case Op::I32TruncF64S: 165 case Op::I32TruncF64U: 166 case Op::I64ExtendI32S: 167 case Op::I64ExtendI32U: 168 case Op::I64TruncF32S: 169 case Op::I64TruncF32U: 170 case Op::I64TruncF64S: 171 case Op::I64TruncF64U: 172 case Op::I64ReinterpretF64: 173 case Op::I64Eqz: 174 case Op::F32ConvertI32S: 175 case Op::F32ConvertI32U: 176 case Op::F32ReinterpretI32: 177 case Op::F32ConvertI64S: 178 case Op::F32ConvertI64U: 179 case Op::F32DemoteF64: 180 case Op::F64ConvertI32S: 181 case Op::F64ConvertI32U: 182 case Op::F64ConvertI64S: 183 case Op::F64ConvertI64U: 184 case Op::F64ReinterpretI64: 185 case Op::F64PromoteF32: 186 case Op::I32Extend8S: 187 case Op::I32Extend16S: 188 case Op::I64Extend8S: 189 case Op::I64Extend16S: 190 case Op::I64Extend32S: 191 return OpKind::Conversion; 192 case Op::I32Load8S: 193 case Op::I32Load8U: 194 case Op::I32Load16S: 195 case Op::I32Load16U: 196 case Op::I64Load8S: 197 case Op::I64Load8U: 198 case Op::I64Load16S: 199 case Op::I64Load16U: 200 case Op::I64Load32S: 201 case Op::I64Load32U: 202 case Op::I32Load: 203 case Op::I64Load: 204 case Op::F32Load: 205 case Op::F64Load: 206 return OpKind::Load; 207 case Op::I32Store8: 208 case Op::I32Store16: 209 case Op::I64Store8: 210 case Op::I64Store16: 211 case Op::I64Store32: 212 case Op::I32Store: 213 case Op::I64Store: 214 case Op::F32Store: 215 case Op::F64Store: 216 return OpKind::Store; 217 case Op::SelectNumeric: 218 case Op::SelectTyped: 219 return OpKind::Select; 220 case Op::LocalGet: 221 return OpKind::GetLocal; 222 case Op::LocalSet: 223 return OpKind::SetLocal; 224 case Op::LocalTee: 225 return OpKind::TeeLocal; 226 case Op::GlobalGet: 227 return OpKind::GetGlobal; 228 case Op::GlobalSet: 229 return OpKind::SetGlobal; 230 case Op::TableGet: 231 return OpKind::TableGet; 232 case Op::TableSet: 233 return OpKind::TableSet; 234 case Op::Call: 235 return OpKind::Call; 236 case Op::ReturnCall: 237 return OpKind::ReturnCall; 238 case Op::CallIndirect: 239 return OpKind::CallIndirect; 240 case Op::ReturnCallIndirect: 241 return OpKind::ReturnCallIndirect; 242 case Op::CallRef: 243 return OpKind::CallRef; 244 case Op::ReturnCallRef: 245 return OpKind::ReturnCallRef; 246 case Op::Return: 247 case Op::Limit: 248 // Accept Limit, for use in decoding the end of a function after the body. 249 return OpKind::Return; 250 case Op::If: 251 return OpKind::If; 252 case Op::Else: 253 return OpKind::Else; 254 case Op::End: 255 return OpKind::End; 256 case Op::Catch: 257 return OpKind::Catch; 258 case Op::CatchAll: 259 return OpKind::CatchAll; 260 case Op::Delegate: 261 return OpKind::Delegate; 262 case Op::Throw: 263 return OpKind::Throw; 264 case Op::Rethrow: 265 return OpKind::Rethrow; 266 case Op::Try: 267 return OpKind::Try; 268 case Op::ThrowRef: 269 return OpKind::ThrowRef; 270 case Op::TryTable: 271 return OpKind::TryTable; 272 case Op::MemorySize: 273 return OpKind::MemorySize; 274 case Op::MemoryGrow: 275 return OpKind::MemoryGrow; 276 case Op::RefNull: 277 return OpKind::RefNull; 278 case Op::RefFunc: 279 return OpKind::RefFunc; 280 case Op::RefIsNull: 281 return OpKind::RefIsNull; 282 case Op::RefAsNonNull: 283 return OpKind::RefAsNonNull; 284 case Op::BrOnNull: 285 return OpKind::BrOnNull; 286 case Op::BrOnNonNull: 287 return OpKind::BrOnNonNull; 288 case Op::RefEq: 289 return OpKind::Comparison; 290 case Op::GcPrefix: { 291 switch (GcOp(op.b1)) { 292 case GcOp::Limit: 293 // Reject Limit for GcPrefix encoding 294 break; 295 case GcOp::StructNew: 296 return OpKind::StructNew; 297 case GcOp::StructNewDefault: 298 return OpKind::StructNewDefault; 299 case GcOp::StructGet: 300 case GcOp::StructGetS: 301 case GcOp::StructGetU: 302 return OpKind::StructGet; 303 case GcOp::StructSet: 304 return OpKind::StructSet; 305 case GcOp::ArrayNew: 306 return OpKind::ArrayNew; 307 case GcOp::ArrayNewFixed: 308 return OpKind::ArrayNewFixed; 309 case GcOp::ArrayNewDefault: 310 return OpKind::ArrayNewDefault; 311 case GcOp::ArrayNewData: 312 return OpKind::ArrayNewData; 313 case GcOp::ArrayNewElem: 314 return OpKind::ArrayNewElem; 315 case GcOp::ArrayInitData: 316 return OpKind::ArrayInitData; 317 case GcOp::ArrayInitElem: 318 return OpKind::ArrayInitElem; 319 case GcOp::ArrayGet: 320 case GcOp::ArrayGetS: 321 case GcOp::ArrayGetU: 322 return OpKind::ArrayGet; 323 case GcOp::ArraySet: 324 return OpKind::ArraySet; 325 case GcOp::ArrayLen: 326 return OpKind::ArrayLen; 327 case GcOp::ArrayCopy: 328 return OpKind::ArrayCopy; 329 case GcOp::ArrayFill: 330 return OpKind::ArrayFill; 331 case GcOp::RefI31: 332 case GcOp::I31GetS: 333 case GcOp::I31GetU: 334 return OpKind::Conversion; 335 case GcOp::RefTest: 336 case GcOp::RefTestNull: 337 return OpKind::RefTest; 338 case GcOp::RefCast: 339 case GcOp::RefCastNull: 340 return OpKind::RefCast; 341 case GcOp::BrOnCast: 342 case GcOp::BrOnCastFail: 343 return OpKind::BrOnCast; 344 case GcOp::AnyConvertExtern: 345 return OpKind::RefConversion; 346 case GcOp::ExternConvertAny: 347 return OpKind::RefConversion; 348 } 349 break; 350 } 351 case Op::SimdPrefix: { 352 switch (SimdOp(op.b1)) { 353 case SimdOp::MozPMADDUBSW: 354 case SimdOp::Limit: 355 // Reject Limit and reserved codes for SimdPrefix encoding 356 break; 357 case SimdOp::I8x16ExtractLaneS: 358 case SimdOp::I8x16ExtractLaneU: 359 case SimdOp::I16x8ExtractLaneS: 360 case SimdOp::I16x8ExtractLaneU: 361 case SimdOp::I32x4ExtractLane: 362 case SimdOp::I64x2ExtractLane: 363 case SimdOp::F32x4ExtractLane: 364 case SimdOp::F64x2ExtractLane: 365 WASM_SIMD_OP(OpKind::ExtractLane); 366 case SimdOp::I8x16Splat: 367 case SimdOp::I16x8Splat: 368 case SimdOp::I32x4Splat: 369 case SimdOp::I64x2Splat: 370 case SimdOp::F32x4Splat: 371 case SimdOp::F64x2Splat: 372 case SimdOp::V128AnyTrue: 373 case SimdOp::I8x16AllTrue: 374 case SimdOp::I16x8AllTrue: 375 case SimdOp::I32x4AllTrue: 376 case SimdOp::I64x2AllTrue: 377 case SimdOp::I8x16Bitmask: 378 case SimdOp::I16x8Bitmask: 379 case SimdOp::I32x4Bitmask: 380 case SimdOp::I64x2Bitmask: 381 WASM_SIMD_OP(OpKind::Conversion); 382 case SimdOp::I8x16ReplaceLane: 383 case SimdOp::I16x8ReplaceLane: 384 case SimdOp::I32x4ReplaceLane: 385 case SimdOp::I64x2ReplaceLane: 386 case SimdOp::F32x4ReplaceLane: 387 case SimdOp::F64x2ReplaceLane: 388 WASM_SIMD_OP(OpKind::ReplaceLane); 389 case SimdOp::I8x16Eq: 390 case SimdOp::I8x16Ne: 391 case SimdOp::I8x16LtS: 392 case SimdOp::I8x16LtU: 393 case SimdOp::I8x16GtS: 394 case SimdOp::I8x16GtU: 395 case SimdOp::I8x16LeS: 396 case SimdOp::I8x16LeU: 397 case SimdOp::I8x16GeS: 398 case SimdOp::I8x16GeU: 399 case SimdOp::I16x8Eq: 400 case SimdOp::I16x8Ne: 401 case SimdOp::I16x8LtS: 402 case SimdOp::I16x8LtU: 403 case SimdOp::I16x8GtS: 404 case SimdOp::I16x8GtU: 405 case SimdOp::I16x8LeS: 406 case SimdOp::I16x8LeU: 407 case SimdOp::I16x8GeS: 408 case SimdOp::I16x8GeU: 409 case SimdOp::I32x4Eq: 410 case SimdOp::I32x4Ne: 411 case SimdOp::I32x4LtS: 412 case SimdOp::I32x4LtU: 413 case SimdOp::I32x4GtS: 414 case SimdOp::I32x4GtU: 415 case SimdOp::I32x4LeS: 416 case SimdOp::I32x4LeU: 417 case SimdOp::I32x4GeS: 418 case SimdOp::I32x4GeU: 419 case SimdOp::I64x2Eq: 420 case SimdOp::I64x2Ne: 421 case SimdOp::I64x2LtS: 422 case SimdOp::I64x2GtS: 423 case SimdOp::I64x2LeS: 424 case SimdOp::I64x2GeS: 425 case SimdOp::F32x4Eq: 426 case SimdOp::F32x4Ne: 427 case SimdOp::F32x4Lt: 428 case SimdOp::F32x4Gt: 429 case SimdOp::F32x4Le: 430 case SimdOp::F32x4Ge: 431 case SimdOp::F64x2Eq: 432 case SimdOp::F64x2Ne: 433 case SimdOp::F64x2Lt: 434 case SimdOp::F64x2Gt: 435 case SimdOp::F64x2Le: 436 case SimdOp::F64x2Ge: 437 case SimdOp::V128And: 438 case SimdOp::V128Or: 439 case SimdOp::V128Xor: 440 case SimdOp::V128AndNot: 441 case SimdOp::I8x16AvgrU: 442 case SimdOp::I16x8AvgrU: 443 case SimdOp::I8x16Add: 444 case SimdOp::I8x16AddSatS: 445 case SimdOp::I8x16AddSatU: 446 case SimdOp::I8x16Sub: 447 case SimdOp::I8x16SubSatS: 448 case SimdOp::I8x16SubSatU: 449 case SimdOp::I8x16MinS: 450 case SimdOp::I8x16MaxS: 451 case SimdOp::I8x16MinU: 452 case SimdOp::I8x16MaxU: 453 case SimdOp::I16x8Add: 454 case SimdOp::I16x8AddSatS: 455 case SimdOp::I16x8AddSatU: 456 case SimdOp::I16x8Sub: 457 case SimdOp::I16x8SubSatS: 458 case SimdOp::I16x8SubSatU: 459 case SimdOp::I16x8Mul: 460 case SimdOp::I16x8MinS: 461 case SimdOp::I16x8MaxS: 462 case SimdOp::I16x8MinU: 463 case SimdOp::I16x8MaxU: 464 case SimdOp::I32x4Add: 465 case SimdOp::I32x4Sub: 466 case SimdOp::I32x4Mul: 467 case SimdOp::I32x4MinS: 468 case SimdOp::I32x4MaxS: 469 case SimdOp::I32x4MinU: 470 case SimdOp::I32x4MaxU: 471 case SimdOp::I64x2Add: 472 case SimdOp::I64x2Sub: 473 case SimdOp::I64x2Mul: 474 case SimdOp::F32x4Add: 475 case SimdOp::F32x4Sub: 476 case SimdOp::F32x4Mul: 477 case SimdOp::F32x4Div: 478 case SimdOp::F32x4Min: 479 case SimdOp::F32x4Max: 480 case SimdOp::F64x2Add: 481 case SimdOp::F64x2Sub: 482 case SimdOp::F64x2Mul: 483 case SimdOp::F64x2Div: 484 case SimdOp::F64x2Min: 485 case SimdOp::F64x2Max: 486 case SimdOp::I8x16NarrowI16x8S: 487 case SimdOp::I8x16NarrowI16x8U: 488 case SimdOp::I16x8NarrowI32x4S: 489 case SimdOp::I16x8NarrowI32x4U: 490 case SimdOp::I8x16Swizzle: 491 case SimdOp::F32x4PMin: 492 case SimdOp::F32x4PMax: 493 case SimdOp::F64x2PMin: 494 case SimdOp::F64x2PMax: 495 case SimdOp::I32x4DotI16x8S: 496 case SimdOp::I16x8ExtmulLowI8x16S: 497 case SimdOp::I16x8ExtmulHighI8x16S: 498 case SimdOp::I16x8ExtmulLowI8x16U: 499 case SimdOp::I16x8ExtmulHighI8x16U: 500 case SimdOp::I32x4ExtmulLowI16x8S: 501 case SimdOp::I32x4ExtmulHighI16x8S: 502 case SimdOp::I32x4ExtmulLowI16x8U: 503 case SimdOp::I32x4ExtmulHighI16x8U: 504 case SimdOp::I64x2ExtmulLowI32x4S: 505 case SimdOp::I64x2ExtmulHighI32x4S: 506 case SimdOp::I64x2ExtmulLowI32x4U: 507 case SimdOp::I64x2ExtmulHighI32x4U: 508 case SimdOp::I16x8Q15MulrSatS: 509 case SimdOp::F32x4RelaxedMin: 510 case SimdOp::F32x4RelaxedMax: 511 case SimdOp::F64x2RelaxedMin: 512 case SimdOp::F64x2RelaxedMax: 513 case SimdOp::I8x16RelaxedSwizzle: 514 case SimdOp::I16x8RelaxedQ15MulrS: 515 case SimdOp::I16x8RelaxedDotI8x16I7x16S: 516 WASM_SIMD_OP(OpKind::Binary); 517 case SimdOp::I8x16Neg: 518 case SimdOp::I16x8Neg: 519 case SimdOp::I16x8ExtendLowI8x16S: 520 case SimdOp::I16x8ExtendHighI8x16S: 521 case SimdOp::I16x8ExtendLowI8x16U: 522 case SimdOp::I16x8ExtendHighI8x16U: 523 case SimdOp::I32x4Neg: 524 case SimdOp::I32x4ExtendLowI16x8S: 525 case SimdOp::I32x4ExtendHighI16x8S: 526 case SimdOp::I32x4ExtendLowI16x8U: 527 case SimdOp::I32x4ExtendHighI16x8U: 528 case SimdOp::I32x4TruncSatF32x4S: 529 case SimdOp::I32x4TruncSatF32x4U: 530 case SimdOp::I64x2Neg: 531 case SimdOp::I64x2ExtendLowI32x4S: 532 case SimdOp::I64x2ExtendHighI32x4S: 533 case SimdOp::I64x2ExtendLowI32x4U: 534 case SimdOp::I64x2ExtendHighI32x4U: 535 case SimdOp::F32x4Abs: 536 case SimdOp::F32x4Neg: 537 case SimdOp::F32x4Sqrt: 538 case SimdOp::F32x4ConvertI32x4S: 539 case SimdOp::F32x4ConvertI32x4U: 540 case SimdOp::F64x2Abs: 541 case SimdOp::F64x2Neg: 542 case SimdOp::F64x2Sqrt: 543 case SimdOp::V128Not: 544 case SimdOp::I8x16Popcnt: 545 case SimdOp::I8x16Abs: 546 case SimdOp::I16x8Abs: 547 case SimdOp::I32x4Abs: 548 case SimdOp::I64x2Abs: 549 case SimdOp::F32x4Ceil: 550 case SimdOp::F32x4Floor: 551 case SimdOp::F32x4Trunc: 552 case SimdOp::F32x4Nearest: 553 case SimdOp::F64x2Ceil: 554 case SimdOp::F64x2Floor: 555 case SimdOp::F64x2Trunc: 556 case SimdOp::F64x2Nearest: 557 case SimdOp::F32x4DemoteF64x2Zero: 558 case SimdOp::F64x2PromoteLowF32x4: 559 case SimdOp::F64x2ConvertLowI32x4S: 560 case SimdOp::F64x2ConvertLowI32x4U: 561 case SimdOp::I32x4TruncSatF64x2SZero: 562 case SimdOp::I32x4TruncSatF64x2UZero: 563 case SimdOp::I16x8ExtaddPairwiseI8x16S: 564 case SimdOp::I16x8ExtaddPairwiseI8x16U: 565 case SimdOp::I32x4ExtaddPairwiseI16x8S: 566 case SimdOp::I32x4ExtaddPairwiseI16x8U: 567 case SimdOp::I32x4RelaxedTruncF32x4S: 568 case SimdOp::I32x4RelaxedTruncF32x4U: 569 case SimdOp::I32x4RelaxedTruncF64x2SZero: 570 case SimdOp::I32x4RelaxedTruncF64x2UZero: 571 WASM_SIMD_OP(OpKind::Unary); 572 case SimdOp::I8x16Shl: 573 case SimdOp::I8x16ShrS: 574 case SimdOp::I8x16ShrU: 575 case SimdOp::I16x8Shl: 576 case SimdOp::I16x8ShrS: 577 case SimdOp::I16x8ShrU: 578 case SimdOp::I32x4Shl: 579 case SimdOp::I32x4ShrS: 580 case SimdOp::I32x4ShrU: 581 case SimdOp::I64x2Shl: 582 case SimdOp::I64x2ShrS: 583 case SimdOp::I64x2ShrU: 584 WASM_SIMD_OP(OpKind::VectorShift); 585 case SimdOp::V128Bitselect: 586 WASM_SIMD_OP(OpKind::Ternary); 587 case SimdOp::I8x16Shuffle: 588 WASM_SIMD_OP(OpKind::VectorShuffle); 589 case SimdOp::V128Const: 590 WASM_SIMD_OP(OpKind::V128Const); 591 case SimdOp::V128Load: 592 case SimdOp::V128Load8Splat: 593 case SimdOp::V128Load16Splat: 594 case SimdOp::V128Load32Splat: 595 case SimdOp::V128Load64Splat: 596 case SimdOp::V128Load8x8S: 597 case SimdOp::V128Load8x8U: 598 case SimdOp::V128Load16x4S: 599 case SimdOp::V128Load16x4U: 600 case SimdOp::V128Load32x2S: 601 case SimdOp::V128Load32x2U: 602 case SimdOp::V128Load32Zero: 603 case SimdOp::V128Load64Zero: 604 WASM_SIMD_OP(OpKind::Load); 605 case SimdOp::V128Store: 606 WASM_SIMD_OP(OpKind::Store); 607 case SimdOp::V128Load8Lane: 608 case SimdOp::V128Load16Lane: 609 case SimdOp::V128Load32Lane: 610 case SimdOp::V128Load64Lane: 611 WASM_SIMD_OP(OpKind::LoadLane); 612 case SimdOp::V128Store8Lane: 613 case SimdOp::V128Store16Lane: 614 case SimdOp::V128Store32Lane: 615 case SimdOp::V128Store64Lane: 616 WASM_SIMD_OP(OpKind::StoreLane); 617 case SimdOp::F32x4RelaxedMadd: 618 case SimdOp::F32x4RelaxedNmadd: 619 case SimdOp::F64x2RelaxedMadd: 620 case SimdOp::F64x2RelaxedNmadd: 621 case SimdOp::I8x16RelaxedLaneSelect: 622 case SimdOp::I16x8RelaxedLaneSelect: 623 case SimdOp::I32x4RelaxedLaneSelect: 624 case SimdOp::I64x2RelaxedLaneSelect: 625 case SimdOp::I32x4RelaxedDotI8x16I7x16AddS: 626 WASM_SIMD_OP(OpKind::Ternary); 627 } 628 break; 629 } 630 case Op::MiscPrefix: { 631 switch (MiscOp(op.b1)) { 632 case MiscOp::Limit: 633 // Reject Limit for MiscPrefix encoding 634 break; 635 case MiscOp::I32TruncSatF32S: 636 case MiscOp::I32TruncSatF32U: 637 case MiscOp::I32TruncSatF64S: 638 case MiscOp::I32TruncSatF64U: 639 case MiscOp::I64TruncSatF32S: 640 case MiscOp::I64TruncSatF32U: 641 case MiscOp::I64TruncSatF64S: 642 case MiscOp::I64TruncSatF64U: 643 return OpKind::Conversion; 644 case MiscOp::MemoryCopy: 645 case MiscOp::TableCopy: 646 return OpKind::MemOrTableCopy; 647 case MiscOp::DataDrop: 648 case MiscOp::ElemDrop: 649 return OpKind::DataOrElemDrop; 650 case MiscOp::MemoryFill: 651 return OpKind::MemFill; 652 case MiscOp::MemoryInit: 653 case MiscOp::TableInit: 654 return OpKind::MemOrTableInit; 655 case MiscOp::TableFill: 656 return OpKind::TableFill; 657 case MiscOp::MemoryDiscard: 658 return OpKind::MemDiscard; 659 case MiscOp::TableGrow: 660 return OpKind::TableGrow; 661 case MiscOp::TableSize: 662 return OpKind::TableSize; 663 } 664 break; 665 } 666 case Op::ThreadPrefix: { 667 switch (ThreadOp(op.b1)) { 668 case ThreadOp::Limit: 669 // Reject Limit for ThreadPrefix encoding 670 break; 671 case ThreadOp::Notify: 672 return OpKind::Notify; 673 case ThreadOp::I32Wait: 674 case ThreadOp::I64Wait: 675 return OpKind::Wait; 676 case ThreadOp::Fence: 677 return OpKind::Fence; 678 case ThreadOp::I32AtomicLoad: 679 case ThreadOp::I64AtomicLoad: 680 case ThreadOp::I32AtomicLoad8U: 681 case ThreadOp::I32AtomicLoad16U: 682 case ThreadOp::I64AtomicLoad8U: 683 case ThreadOp::I64AtomicLoad16U: 684 case ThreadOp::I64AtomicLoad32U: 685 return OpKind::AtomicLoad; 686 case ThreadOp::I32AtomicStore: 687 case ThreadOp::I64AtomicStore: 688 case ThreadOp::I32AtomicStore8U: 689 case ThreadOp::I32AtomicStore16U: 690 case ThreadOp::I64AtomicStore8U: 691 case ThreadOp::I64AtomicStore16U: 692 case ThreadOp::I64AtomicStore32U: 693 return OpKind::AtomicStore; 694 case ThreadOp::I32AtomicAdd: 695 case ThreadOp::I64AtomicAdd: 696 case ThreadOp::I32AtomicAdd8U: 697 case ThreadOp::I32AtomicAdd16U: 698 case ThreadOp::I64AtomicAdd8U: 699 case ThreadOp::I64AtomicAdd16U: 700 case ThreadOp::I64AtomicAdd32U: 701 case ThreadOp::I32AtomicSub: 702 case ThreadOp::I64AtomicSub: 703 case ThreadOp::I32AtomicSub8U: 704 case ThreadOp::I32AtomicSub16U: 705 case ThreadOp::I64AtomicSub8U: 706 case ThreadOp::I64AtomicSub16U: 707 case ThreadOp::I64AtomicSub32U: 708 case ThreadOp::I32AtomicAnd: 709 case ThreadOp::I64AtomicAnd: 710 case ThreadOp::I32AtomicAnd8U: 711 case ThreadOp::I32AtomicAnd16U: 712 case ThreadOp::I64AtomicAnd8U: 713 case ThreadOp::I64AtomicAnd16U: 714 case ThreadOp::I64AtomicAnd32U: 715 case ThreadOp::I32AtomicOr: 716 case ThreadOp::I64AtomicOr: 717 case ThreadOp::I32AtomicOr8U: 718 case ThreadOp::I32AtomicOr16U: 719 case ThreadOp::I64AtomicOr8U: 720 case ThreadOp::I64AtomicOr16U: 721 case ThreadOp::I64AtomicOr32U: 722 case ThreadOp::I32AtomicXor: 723 case ThreadOp::I64AtomicXor: 724 case ThreadOp::I32AtomicXor8U: 725 case ThreadOp::I32AtomicXor16U: 726 case ThreadOp::I64AtomicXor8U: 727 case ThreadOp::I64AtomicXor16U: 728 case ThreadOp::I64AtomicXor32U: 729 case ThreadOp::I32AtomicXchg: 730 case ThreadOp::I64AtomicXchg: 731 case ThreadOp::I32AtomicXchg8U: 732 case ThreadOp::I32AtomicXchg16U: 733 case ThreadOp::I64AtomicXchg8U: 734 case ThreadOp::I64AtomicXchg16U: 735 case ThreadOp::I64AtomicXchg32U: 736 return OpKind::AtomicRMW; 737 case ThreadOp::I32AtomicCmpXchg: 738 case ThreadOp::I64AtomicCmpXchg: 739 case ThreadOp::I32AtomicCmpXchg8U: 740 case ThreadOp::I32AtomicCmpXchg16U: 741 case ThreadOp::I64AtomicCmpXchg8U: 742 case ThreadOp::I64AtomicCmpXchg16U: 743 case ThreadOp::I64AtomicCmpXchg32U: 744 return OpKind::AtomicCmpXchg; 745 default: 746 break; 747 } 748 break; 749 } 750 case Op::MozPrefix: { 751 switch (MozOp(op.b1)) { 752 case MozOp::Limit: 753 // Reject Limit for the MozPrefix encoding 754 break; 755 case MozOp::TeeGlobal: 756 return OpKind::TeeGlobal; 757 case MozOp::I32BitNot: 758 case MozOp::I32Abs: 759 case MozOp::I32Neg: 760 return OpKind::Unary; 761 case MozOp::I32Min: 762 case MozOp::I32Max: 763 case MozOp::F64Mod: 764 case MozOp::F64Pow: 765 case MozOp::F64Atan2: 766 return OpKind::Binary; 767 case MozOp::F64SinNative: 768 case MozOp::F64SinFdlibm: 769 case MozOp::F64CosNative: 770 case MozOp::F64CosFdlibm: 771 case MozOp::F64TanNative: 772 case MozOp::F64TanFdlibm: 773 case MozOp::F64Asin: 774 case MozOp::F64Acos: 775 case MozOp::F64Atan: 776 case MozOp::F64Exp: 777 case MozOp::F64Log: 778 return OpKind::Unary; 779 case MozOp::I32TeeStore8: 780 case MozOp::I32TeeStore16: 781 case MozOp::I64TeeStore8: 782 case MozOp::I64TeeStore16: 783 case MozOp::I64TeeStore32: 784 case MozOp::I32TeeStore: 785 case MozOp::I64TeeStore: 786 case MozOp::F32TeeStore: 787 case MozOp::F64TeeStore: 788 case MozOp::F32TeeStoreF64: 789 case MozOp::F64TeeStoreF32: 790 return OpKind::TeeStore; 791 case MozOp::OldCallDirect: 792 return OpKind::OldCallDirect; 793 case MozOp::OldCallIndirect: 794 return OpKind::OldCallIndirect; 795 case MozOp::CallBuiltinModuleFunc: 796 return OpKind::CallBuiltinModuleFunc; 797 case MozOp::StackSwitch: 798 return OpKind::StackSwitch; 799 } 800 break; 801 } 802 case Op::FirstPrefix: 803 break; 804 } 805 MOZ_CRASH("unimplemented opcode"); 806 } 807 #endif // DEBUG 808 809 const char* OpBytes::toString() const { 810 switch (Op(b0)) { 811 case Op::Unreachable: 812 return "unreachable"; 813 case Op::Nop: 814 return "nop"; 815 case Op::Block: 816 return "block"; 817 case Op::Loop: 818 return "loop"; 819 case Op::If: 820 return "if"; 821 case Op::Else: 822 return "else"; 823 case Op::Try: 824 return "try"; 825 case Op::Catch: 826 return "catch"; 827 case Op::Throw: 828 return "throw"; 829 case Op::Rethrow: 830 return "rethrow"; 831 case Op::ThrowRef: 832 return "throw_ref"; 833 case Op::End: 834 return "end"; 835 case Op::Br: 836 return "br"; 837 case Op::BrIf: 838 return "br_if"; 839 case Op::BrTable: 840 return "br_table"; 841 case Op::Return: 842 return "return"; 843 case Op::Call: 844 return "call"; 845 case Op::CallIndirect: 846 return "call_indirect"; 847 case Op::ReturnCall: 848 return "return_call"; 849 case Op::ReturnCallIndirect: 850 return "return_call_indirect"; 851 case Op::CallRef: 852 return "call_ref"; 853 case Op::ReturnCallRef: 854 return "return_call_ref"; 855 case Op::Delegate: 856 return "delegate"; 857 case Op::CatchAll: 858 return "catch_all"; 859 case Op::Drop: 860 return "drop"; 861 case Op::SelectNumeric: 862 return "select"; 863 case Op::SelectTyped: 864 return "select"; 865 case Op::TryTable: 866 return "try_table"; 867 case Op::LocalGet: 868 return "local.get"; 869 case Op::LocalSet: 870 return "local.set"; 871 case Op::LocalTee: 872 return "local.tee"; 873 case Op::GlobalGet: 874 return "global.get"; 875 case Op::GlobalSet: 876 return "global.set"; 877 case Op::TableGet: 878 return "table.get"; 879 case Op::TableSet: 880 return "table.set"; 881 case Op::I32Load: 882 return "i32.load"; 883 case Op::I64Load: 884 return "i64.load"; 885 case Op::F32Load: 886 return "f32.load"; 887 case Op::F64Load: 888 return "f64.load"; 889 case Op::I32Load8S: 890 return "i32.load8_s"; 891 case Op::I32Load8U: 892 return "i32.load8_u"; 893 case Op::I32Load16S: 894 return "i32.load16_s"; 895 case Op::I32Load16U: 896 return "i32.load16_u"; 897 case Op::I64Load8S: 898 return "i64.load8_s"; 899 case Op::I64Load8U: 900 return "i64.load8_u"; 901 case Op::I64Load16S: 902 return "i64.load16_s"; 903 case Op::I64Load16U: 904 return "i64.load16_u"; 905 case Op::I64Load32S: 906 return "i64.load32_s"; 907 case Op::I64Load32U: 908 return "i64.load32_u"; 909 case Op::I32Store: 910 return "i32.store"; 911 case Op::I64Store: 912 return "i64.store"; 913 case Op::F32Store: 914 return "f32.store"; 915 case Op::F64Store: 916 return "f64.store"; 917 case Op::I32Store8: 918 return "i32.store8"; 919 case Op::I32Store16: 920 return "i32.store16"; 921 case Op::I64Store8: 922 return "i64.store8"; 923 case Op::I64Store16: 924 return "i64.store16"; 925 case Op::I64Store32: 926 return "i64.store32"; 927 case Op::MemorySize: 928 return "memory.size"; 929 case Op::MemoryGrow: 930 return "memory.grow"; 931 case Op::I32Const: 932 return "i32.const"; 933 case Op::I64Const: 934 return "i64.const"; 935 case Op::F32Const: 936 return "f32.const"; 937 case Op::F64Const: 938 return "f64.const"; 939 case Op::I32Eqz: 940 return "i32.eqz"; 941 case Op::I32Eq: 942 return "i32.eq"; 943 case Op::I32Ne: 944 return "i32.ne"; 945 case Op::I32LtS: 946 return "i32.lt_s"; 947 case Op::I32LtU: 948 return "i32.lt_u"; 949 case Op::I32GtS: 950 return "i32.gt_s"; 951 case Op::I32GtU: 952 return "i32.gt_u"; 953 case Op::I32LeS: 954 return "i32.le_s"; 955 case Op::I32LeU: 956 return "i32.le_u"; 957 case Op::I32GeS: 958 return "i32.ge_s"; 959 case Op::I32GeU: 960 return "i32.ge_u"; 961 case Op::I64Eqz: 962 return "i64.eqz"; 963 case Op::I64Eq: 964 return "i64.eq"; 965 case Op::I64Ne: 966 return "i64.ne"; 967 case Op::I64LtS: 968 return "i64.lt_s"; 969 case Op::I64LtU: 970 return "i64.lt_u"; 971 case Op::I64GtS: 972 return "i64.gt_s"; 973 case Op::I64GtU: 974 return "i64.gt_u"; 975 case Op::I64LeS: 976 return "i64.le_s"; 977 case Op::I64LeU: 978 return "i64.le_u"; 979 case Op::I64GeS: 980 return "i64.ge_s"; 981 case Op::I64GeU: 982 return "i64.ge_u"; 983 case Op::F32Eq: 984 return "f32.eq"; 985 case Op::F32Ne: 986 return "f32.ne"; 987 case Op::F32Lt: 988 return "f32.lt"; 989 case Op::F32Gt: 990 return "f32.gt"; 991 case Op::F32Le: 992 return "f32.le"; 993 case Op::F32Ge: 994 return "f32.ge"; 995 case Op::F64Eq: 996 return "f64.eq"; 997 case Op::F64Ne: 998 return "f64.ne"; 999 case Op::F64Lt: 1000 return "f64.lt"; 1001 case Op::F64Gt: 1002 return "f64.gt"; 1003 case Op::F64Le: 1004 return "f64.le"; 1005 case Op::F64Ge: 1006 return "f64.ge"; 1007 case Op::I32Clz: 1008 return "i32.clz"; 1009 case Op::I32Ctz: 1010 return "i32.ctz"; 1011 case Op::I32Popcnt: 1012 return "i32.popcnt"; 1013 case Op::I32Add: 1014 return "i32.add"; 1015 case Op::I32Sub: 1016 return "i32.sub"; 1017 case Op::I32Mul: 1018 return "i32.mul"; 1019 case Op::I32DivS: 1020 return "i32.div_s"; 1021 case Op::I32DivU: 1022 return "i32.div_u"; 1023 case Op::I32RemS: 1024 return "i32.rem_s"; 1025 case Op::I32RemU: 1026 return "i32.rem_u"; 1027 case Op::I32And: 1028 return "i32.and"; 1029 case Op::I32Or: 1030 return "i32.or"; 1031 case Op::I32Xor: 1032 return "i32.xor"; 1033 case Op::I32Shl: 1034 return "i32.shl"; 1035 case Op::I32ShrS: 1036 return "i32.shr_s"; 1037 case Op::I32ShrU: 1038 return "i32.shr_u"; 1039 case Op::I32Rotl: 1040 return "i32.rotl"; 1041 case Op::I32Rotr: 1042 return "i32.rotr"; 1043 case Op::I64Clz: 1044 return "i64.clz"; 1045 case Op::I64Ctz: 1046 return "i64.ctz"; 1047 case Op::I64Popcnt: 1048 return "i64.popcnt"; 1049 case Op::I64Add: 1050 return "i64.add"; 1051 case Op::I64Sub: 1052 return "i64.sub"; 1053 case Op::I64Mul: 1054 return "i64.mul"; 1055 case Op::I64DivS: 1056 return "i64.div_s"; 1057 case Op::I64DivU: 1058 return "i64.div_u"; 1059 case Op::I64RemS: 1060 return "i64.rem_s"; 1061 case Op::I64RemU: 1062 return "i64.rem_u"; 1063 case Op::I64And: 1064 return "i64.and"; 1065 case Op::I64Or: 1066 return "i64.or"; 1067 case Op::I64Xor: 1068 return "i64.xor"; 1069 case Op::I64Shl: 1070 return "i64.shl"; 1071 case Op::I64ShrS: 1072 return "i64.shr_s"; 1073 case Op::I64ShrU: 1074 return "i64.shr_u"; 1075 case Op::I64Rotl: 1076 return "i64.rotl"; 1077 case Op::I64Rotr: 1078 return "i64.rotr"; 1079 case Op::F32Abs: 1080 return "f32.abs"; 1081 case Op::F32Neg: 1082 return "f32.neg"; 1083 case Op::F32Ceil: 1084 return "f32.ceil"; 1085 case Op::F32Floor: 1086 return "f32.floor"; 1087 case Op::F32Trunc: 1088 return "f32.trunc"; 1089 case Op::F32Nearest: 1090 return "f32.nearest"; 1091 case Op::F32Sqrt: 1092 return "f32.sqrt"; 1093 case Op::F32Add: 1094 return "f32.add"; 1095 case Op::F32Sub: 1096 return "f32.sub"; 1097 case Op::F32Mul: 1098 return "f32.mul"; 1099 case Op::F32Div: 1100 return "f32.div"; 1101 case Op::F32Min: 1102 return "f32.min"; 1103 case Op::F32Max: 1104 return "f32.max"; 1105 case Op::F32CopySign: 1106 return "f32.copysign"; 1107 case Op::F64Abs: 1108 return "f64.abs"; 1109 case Op::F64Neg: 1110 return "f64.neg"; 1111 case Op::F64Ceil: 1112 return "f64.ceil"; 1113 case Op::F64Floor: 1114 return "f64.floor"; 1115 case Op::F64Trunc: 1116 return "f64.trunc"; 1117 case Op::F64Nearest: 1118 return "f64.nearest"; 1119 case Op::F64Sqrt: 1120 return "f64.sqrt"; 1121 case Op::F64Add: 1122 return "f64.add"; 1123 case Op::F64Sub: 1124 return "f64.sub"; 1125 case Op::F64Mul: 1126 return "f64.mul"; 1127 case Op::F64Div: 1128 return "f64.div"; 1129 case Op::F64Min: 1130 return "f64.min"; 1131 case Op::F64Max: 1132 return "f64.max"; 1133 case Op::F64CopySign: 1134 return "f64.copysign"; 1135 case Op::I32WrapI64: 1136 return "i32.wrap_i64"; 1137 case Op::I32TruncF32S: 1138 return "i32.trunc_f32_s"; 1139 case Op::I32TruncF32U: 1140 return "i32.trunc_f32_u"; 1141 case Op::I32TruncF64S: 1142 return "i32.trunc_f64_s"; 1143 case Op::I32TruncF64U: 1144 return "i32.trunc_f64_u"; 1145 case Op::I64ExtendI32S: 1146 return "i64.extend_i32_s"; 1147 case Op::I64ExtendI32U: 1148 return "i64.extend_i32_u"; 1149 case Op::I64TruncF32S: 1150 return "i64.trunc_f32_s"; 1151 case Op::I64TruncF32U: 1152 return "i64.trunc_f32_u"; 1153 case Op::I64TruncF64S: 1154 return "i64.trunc_f64_s"; 1155 case Op::I64TruncF64U: 1156 return "i64.trunc_f64_u"; 1157 case Op::F32ConvertI32S: 1158 return "f32.convert_i32_s"; 1159 case Op::F32ConvertI32U: 1160 return "f32.convert_i32_u"; 1161 case Op::F32ConvertI64S: 1162 return "f32.convert_i64_s"; 1163 case Op::F32ConvertI64U: 1164 return "f32.convert_i64_u"; 1165 case Op::F32DemoteF64: 1166 return "f32.demote_f64"; 1167 case Op::F64ConvertI32S: 1168 return "f64.convert_i32_s"; 1169 case Op::F64ConvertI32U: 1170 return "f64.convert_i32_u"; 1171 case Op::F64ConvertI64S: 1172 return "f64.convert_i64_s"; 1173 case Op::F64ConvertI64U: 1174 return "f64.convert_i64_u"; 1175 case Op::F64PromoteF32: 1176 return "f64.promote_f32"; 1177 case Op::I32ReinterpretF32: 1178 return "i32.reinterpret_f32"; 1179 case Op::I64ReinterpretF64: 1180 return "i64.reinterpret_f64"; 1181 case Op::F32ReinterpretI32: 1182 return "f32.reinterpret_i32"; 1183 case Op::F64ReinterpretI64: 1184 return "f64.reinterpret_i64"; 1185 case Op::I32Extend8S: 1186 return "i32.extend8_s"; 1187 case Op::I32Extend16S: 1188 return "i32.extend16_s"; 1189 case Op::I64Extend8S: 1190 return "i64.extend8_s"; 1191 case Op::I64Extend16S: 1192 return "i64.extend16_s"; 1193 case Op::I64Extend32S: 1194 return "i64.extend32_s"; 1195 case Op::RefNull: 1196 return "ref.null"; 1197 case Op::RefIsNull: 1198 return "ref.is_null"; 1199 case Op::RefFunc: 1200 return "ref.func"; 1201 case Op::RefAsNonNull: 1202 return "ref.as_non_null"; 1203 case Op::BrOnNull: 1204 return "br_on_null"; 1205 case Op::RefEq: 1206 return "ref.eq"; 1207 case Op::BrOnNonNull: 1208 return "br_on_non_null"; 1209 case Op::GcPrefix: { 1210 switch (GcOp(b1)) { 1211 case GcOp::StructNew: 1212 return "struct.new"; 1213 case GcOp::StructNewDefault: 1214 return "struct.new_default"; 1215 case GcOp::StructGet: 1216 return "struct.get"; 1217 case GcOp::StructGetS: 1218 return "struct.get_s"; 1219 case GcOp::StructGetU: 1220 return "struct.get_u"; 1221 case GcOp::StructSet: 1222 return "struct.set"; 1223 case GcOp::ArrayNew: 1224 return "array.new"; 1225 case GcOp::ArrayNewDefault: 1226 return "array.new_default"; 1227 case GcOp::ArrayNewFixed: 1228 return "array.new_fixed"; 1229 case GcOp::ArrayNewData: 1230 return "array.new_data"; 1231 case GcOp::ArrayNewElem: 1232 return "array.new_elem"; 1233 case GcOp::ArrayGet: 1234 return "array.get"; 1235 case GcOp::ArrayGetS: 1236 return "array.get_s"; 1237 case GcOp::ArrayGetU: 1238 return "array.get_u"; 1239 case GcOp::ArraySet: 1240 return "array.set"; 1241 case GcOp::ArrayLen: 1242 return "array.len"; 1243 case GcOp::ArrayFill: 1244 return "array.fill"; 1245 case GcOp::ArrayCopy: 1246 return "array.copy"; 1247 case GcOp::ArrayInitData: 1248 return "array.init_data"; 1249 case GcOp::ArrayInitElem: 1250 return "array.init_elem"; 1251 case GcOp::RefTest: 1252 return "ref.test"; 1253 case GcOp::RefTestNull: 1254 return "ref.test"; 1255 case GcOp::RefCast: 1256 return "ref.cast"; 1257 case GcOp::RefCastNull: 1258 return "ref.cast"; 1259 case GcOp::BrOnCast: 1260 return "br_on_cast"; 1261 case GcOp::BrOnCastFail: 1262 return "br_on_cast_fail"; 1263 case GcOp::AnyConvertExtern: 1264 return "any.convert_extern"; 1265 case GcOp::ExternConvertAny: 1266 return "extern.convert_any"; 1267 case GcOp::RefI31: 1268 return "ref.i31"; 1269 case GcOp::I31GetS: 1270 return "i31.get_s"; 1271 case GcOp::I31GetU: 1272 return "i31.get_u"; 1273 default: 1274 return "unknown"; 1275 } 1276 } 1277 case Op::MiscPrefix: { 1278 switch (MiscOp(b1)) { 1279 case MiscOp::I32TruncSatF32S: 1280 return "i32.trunc_sat_f32_s"; 1281 case MiscOp::I32TruncSatF32U: 1282 return "i32.trunc_sat_f32_u"; 1283 case MiscOp::I32TruncSatF64S: 1284 return "i32.trunc_sat_f64_s"; 1285 case MiscOp::I32TruncSatF64U: 1286 return "i32.trunc_sat_f64_u"; 1287 case MiscOp::I64TruncSatF32S: 1288 return "i64.trunc_sat_f32_s"; 1289 case MiscOp::I64TruncSatF32U: 1290 return "i64.trunc_sat_f32_u"; 1291 case MiscOp::I64TruncSatF64S: 1292 return "i64.trunc_sat_f64_s"; 1293 case MiscOp::I64TruncSatF64U: 1294 return "i64.trunc_sat_f64_u"; 1295 case MiscOp::MemoryInit: 1296 return "memory.init"; 1297 case MiscOp::DataDrop: 1298 return "data.drop"; 1299 case MiscOp::MemoryCopy: 1300 return "memory.copy"; 1301 case MiscOp::MemoryFill: 1302 return "memory.fill"; 1303 case MiscOp::TableInit: 1304 return "table.init"; 1305 case MiscOp::ElemDrop: 1306 return "elem.drop"; 1307 case MiscOp::TableCopy: 1308 return "table.copy"; 1309 case MiscOp::TableGrow: 1310 return "table.grow"; 1311 case MiscOp::TableSize: 1312 return "table.size"; 1313 case MiscOp::TableFill: 1314 return "table.fill"; 1315 case MiscOp::MemoryDiscard: 1316 return "memory.discard"; 1317 default: 1318 return "unknown"; 1319 } 1320 } 1321 case Op::SimdPrefix: { 1322 switch (SimdOp(b1)) { 1323 case SimdOp::V128Load: 1324 return "v128.load"; 1325 case SimdOp::V128Load8x8S: 1326 return "v128.load8x8_s"; 1327 case SimdOp::V128Load8x8U: 1328 return "v128.load8x8_u"; 1329 case SimdOp::V128Load16x4S: 1330 return "v128.load16x4_s"; 1331 case SimdOp::V128Load16x4U: 1332 return "v128.load16x4_u"; 1333 case SimdOp::V128Load32x2S: 1334 return "v128.load32x2_s"; 1335 case SimdOp::V128Load32x2U: 1336 return "v128.load32x2_u"; 1337 case SimdOp::V128Load8Splat: 1338 return "v128.load8_splat"; 1339 case SimdOp::V128Load16Splat: 1340 return "v128.load16_splat"; 1341 case SimdOp::V128Load32Splat: 1342 return "v128.load32_splat"; 1343 case SimdOp::V128Load64Splat: 1344 return "v128.load64_splat"; 1345 case SimdOp::V128Store: 1346 return "v128.store"; 1347 case SimdOp::V128Const: 1348 return "v128.const"; 1349 case SimdOp::I8x16Shuffle: 1350 return "i8x16.shuffle"; 1351 case SimdOp::I8x16Swizzle: 1352 return "i8x16.swizzle"; 1353 case SimdOp::I8x16Splat: 1354 return "i8x16.splat"; 1355 case SimdOp::I16x8Splat: 1356 return "i16x8.splat"; 1357 case SimdOp::I32x4Splat: 1358 return "i32x4.splat"; 1359 case SimdOp::I64x2Splat: 1360 return "i64x2.splat"; 1361 case SimdOp::F32x4Splat: 1362 return "f32x4.splat"; 1363 case SimdOp::F64x2Splat: 1364 return "f64x2.splat"; 1365 case SimdOp::I8x16ExtractLaneS: 1366 return "i8x16.extract_lane_s"; 1367 case SimdOp::I8x16ExtractLaneU: 1368 return "i8x16.extract_lane_u"; 1369 case SimdOp::I8x16ReplaceLane: 1370 return "i8x16.replace_lane"; 1371 case SimdOp::I16x8ExtractLaneS: 1372 return "i16x8.extract_lane_s"; 1373 case SimdOp::I16x8ExtractLaneU: 1374 return "i16x8.extract_lane_u"; 1375 case SimdOp::I16x8ReplaceLane: 1376 return "i16x8.replace_lane"; 1377 case SimdOp::I32x4ExtractLane: 1378 return "i32x4.extract_lane"; 1379 case SimdOp::I32x4ReplaceLane: 1380 return "i32x4.replace_lane"; 1381 case SimdOp::I64x2ExtractLane: 1382 return "i64x2.extract_lane"; 1383 case SimdOp::I64x2ReplaceLane: 1384 return "i64x2.replace_lane"; 1385 case SimdOp::F32x4ExtractLane: 1386 return "f32x4.extract_lane"; 1387 case SimdOp::F32x4ReplaceLane: 1388 return "f32x4.replace_lane"; 1389 case SimdOp::F64x2ExtractLane: 1390 return "f64x2.extract_lane"; 1391 case SimdOp::F64x2ReplaceLane: 1392 return "f64x2.replace_lane"; 1393 case SimdOp::I8x16Eq: 1394 return "i8x16.eq"; 1395 case SimdOp::I8x16Ne: 1396 return "i8x16.ne"; 1397 case SimdOp::I8x16LtS: 1398 return "i8x16.lt_s"; 1399 case SimdOp::I8x16LtU: 1400 return "i8x16.lt_u"; 1401 case SimdOp::I8x16GtS: 1402 return "i8x16.gt_s"; 1403 case SimdOp::I8x16GtU: 1404 return "i8x16.gt_u"; 1405 case SimdOp::I8x16LeS: 1406 return "i8x16.le_s"; 1407 case SimdOp::I8x16LeU: 1408 return "i8x16.le_u"; 1409 case SimdOp::I8x16GeS: 1410 return "i8x16.ge_s"; 1411 case SimdOp::I8x16GeU: 1412 return "i8x16.ge_u"; 1413 case SimdOp::I16x8Eq: 1414 return "i16x8.eq"; 1415 case SimdOp::I16x8Ne: 1416 return "i16x8.ne"; 1417 case SimdOp::I16x8LtS: 1418 return "i16x8.lt_s"; 1419 case SimdOp::I16x8LtU: 1420 return "i16x8.lt_u"; 1421 case SimdOp::I16x8GtS: 1422 return "i16x8.gt_s"; 1423 case SimdOp::I16x8GtU: 1424 return "i16x8.gt_u"; 1425 case SimdOp::I16x8LeS: 1426 return "i16x8.le_s"; 1427 case SimdOp::I16x8LeU: 1428 return "i16x8.le_u"; 1429 case SimdOp::I16x8GeS: 1430 return "i16x8.ge_s"; 1431 case SimdOp::I16x8GeU: 1432 return "i16x8.ge_u"; 1433 case SimdOp::I32x4Eq: 1434 return "i32x4.eq"; 1435 case SimdOp::I32x4Ne: 1436 return "i32x4.ne"; 1437 case SimdOp::I32x4LtS: 1438 return "i32x4.lt_s"; 1439 case SimdOp::I32x4LtU: 1440 return "i32x4.lt_u"; 1441 case SimdOp::I32x4GtS: 1442 return "i32x4.gt_s"; 1443 case SimdOp::I32x4GtU: 1444 return "i32x4.gt_u"; 1445 case SimdOp::I32x4LeS: 1446 return "i32x4.le_s"; 1447 case SimdOp::I32x4LeU: 1448 return "i32x4.le_u"; 1449 case SimdOp::I32x4GeS: 1450 return "i32x4.ge_s"; 1451 case SimdOp::I32x4GeU: 1452 return "i32x4.ge_u"; 1453 case SimdOp::F32x4Eq: 1454 return "f32x4.eq"; 1455 case SimdOp::F32x4Ne: 1456 return "f32x4.ne"; 1457 case SimdOp::F32x4Lt: 1458 return "f32x4.lt"; 1459 case SimdOp::F32x4Gt: 1460 return "f32x4.gt"; 1461 case SimdOp::F32x4Le: 1462 return "f32x4.le"; 1463 case SimdOp::F32x4Ge: 1464 return "f32x4.ge"; 1465 case SimdOp::F64x2Eq: 1466 return "f64x2.eq"; 1467 case SimdOp::F64x2Ne: 1468 return "f64x2.ne"; 1469 case SimdOp::F64x2Lt: 1470 return "f64x2.lt"; 1471 case SimdOp::F64x2Gt: 1472 return "f64x2.gt"; 1473 case SimdOp::F64x2Le: 1474 return "f64x2.le"; 1475 case SimdOp::F64x2Ge: 1476 return "f64x2.ge"; 1477 case SimdOp::V128Not: 1478 return "v128.not"; 1479 case SimdOp::V128And: 1480 return "v128.and"; 1481 case SimdOp::V128AndNot: 1482 return "v128.andnot"; 1483 case SimdOp::V128Or: 1484 return "v128.or"; 1485 case SimdOp::V128Xor: 1486 return "v128.xor"; 1487 case SimdOp::V128Bitselect: 1488 return "v128.bit_select"; 1489 case SimdOp::V128AnyTrue: 1490 return "v128.any_true"; 1491 case SimdOp::V128Load8Lane: 1492 return "v128.load8_lane"; 1493 case SimdOp::V128Load16Lane: 1494 return "v128.load16_lane"; 1495 case SimdOp::V128Load32Lane: 1496 return "v128.load32_lane"; 1497 case SimdOp::V128Load64Lane: 1498 return "v128.load64_lane"; 1499 case SimdOp::V128Store8Lane: 1500 return "v128.store8_lane"; 1501 case SimdOp::V128Store16Lane: 1502 return "v128.store16_lane"; 1503 case SimdOp::V128Store32Lane: 1504 return "v128.store32_lane"; 1505 case SimdOp::V128Store64Lane: 1506 return "v128.store64_lane"; 1507 case SimdOp::V128Load32Zero: 1508 return "v128.load32_zero"; 1509 case SimdOp::V128Load64Zero: 1510 return "v128.load64_zero"; 1511 case SimdOp::F32x4DemoteF64x2Zero: 1512 return "f32x4.demote_f64x2_zero"; 1513 case SimdOp::F64x2PromoteLowF32x4: 1514 return "f64x2.promote_low_f32x4"; 1515 case SimdOp::I8x16Abs: 1516 return "i8x16.abs"; 1517 case SimdOp::I8x16Neg: 1518 return "i8x16.neg"; 1519 case SimdOp::I8x16Popcnt: 1520 return "i8x16.popcnt"; 1521 case SimdOp::I8x16AllTrue: 1522 return "i8x16.all_true"; 1523 case SimdOp::I8x16Bitmask: 1524 return "i8x16.bitmask"; 1525 case SimdOp::I8x16NarrowI16x8S: 1526 return "i8x16.narrow_i16x8_s"; 1527 case SimdOp::I8x16NarrowI16x8U: 1528 return "i8x16.narrow_i16x8_u"; 1529 case SimdOp::F32x4Ceil: 1530 return "f32x4.ceil"; 1531 case SimdOp::F32x4Floor: 1532 return "f32x4.floor"; 1533 case SimdOp::F32x4Trunc: 1534 return "f32x4.trunc"; 1535 case SimdOp::F32x4Nearest: 1536 return "f32x4.nearest"; 1537 case SimdOp::I8x16Shl: 1538 return "i8x16.shl"; 1539 case SimdOp::I8x16ShrS: 1540 return "i8x16.shr_s"; 1541 case SimdOp::I8x16ShrU: 1542 return "i8x16.shr_u"; 1543 case SimdOp::I8x16Add: 1544 return "i8x16.add"; 1545 case SimdOp::I8x16AddSatS: 1546 return "i8x16.add_sat_s"; 1547 case SimdOp::I8x16AddSatU: 1548 return "i8x16.add_sat_u"; 1549 case SimdOp::I8x16Sub: 1550 return "i8x16.sub"; 1551 case SimdOp::I8x16SubSatS: 1552 return "i8x16.sub_sat_s"; 1553 case SimdOp::I8x16SubSatU: 1554 return "i8x16.sub_sat_u"; 1555 case SimdOp::F64x2Ceil: 1556 return "f64x2.ceil"; 1557 case SimdOp::F64x2Floor: 1558 return "f64x2.floor"; 1559 case SimdOp::I8x16MinS: 1560 return "i8x16.min_s"; 1561 case SimdOp::I8x16MinU: 1562 return "i8x16.min_u"; 1563 case SimdOp::I8x16MaxS: 1564 return "i8x16.max_s"; 1565 case SimdOp::I8x16MaxU: 1566 return "i8x16.max_u"; 1567 case SimdOp::F64x2Trunc: 1568 return "f64x2.trunc"; 1569 case SimdOp::I8x16AvgrU: 1570 return "i8x16.avgr_u"; 1571 case SimdOp::I16x8ExtaddPairwiseI8x16S: 1572 return "i16x8.extadd_pairwise_i8x16_s"; 1573 case SimdOp::I16x8ExtaddPairwiseI8x16U: 1574 return "i16x8.extadd_pairwise_i8x16_u"; 1575 case SimdOp::I32x4ExtaddPairwiseI16x8S: 1576 return "i32x4.extadd_pairwise_i16x8_s"; 1577 case SimdOp::I32x4ExtaddPairwiseI16x8U: 1578 return "i32x4.extadd_pairwise_i16x8_u"; 1579 case SimdOp::I16x8Abs: 1580 return "i16x8.abs"; 1581 case SimdOp::I16x8Neg: 1582 return "i16x8.neg"; 1583 case SimdOp::I16x8Q15MulrSatS: 1584 return "i16x8.q15mulr_sat_s"; 1585 case SimdOp::I16x8AllTrue: 1586 return "i16x8.all_true"; 1587 case SimdOp::I16x8Bitmask: 1588 return "i16x8.bitmask"; 1589 case SimdOp::I16x8NarrowI32x4S: 1590 return "i16x8.narrow_i32x4_s"; 1591 case SimdOp::I16x8NarrowI32x4U: 1592 return "i16x8.narrow_i32x4_u"; 1593 case SimdOp::I16x8ExtendLowI8x16S: 1594 return "i16x8.extend_low_i8x16_s"; 1595 case SimdOp::I16x8ExtendHighI8x16S: 1596 return "i16x8.extend_high_i8x16_s"; 1597 case SimdOp::I16x8ExtendLowI8x16U: 1598 return "i16x8.extend_low_i8x16_u"; 1599 case SimdOp::I16x8ExtendHighI8x16U: 1600 return "i16x8.extend_high_i8x16_u"; 1601 case SimdOp::I16x8Shl: 1602 return "i16x8.shl"; 1603 case SimdOp::I16x8ShrS: 1604 return "i16x8.shr_s"; 1605 case SimdOp::I16x8ShrU: 1606 return "i16x8.shr_u"; 1607 case SimdOp::I16x8Add: 1608 return "i16x8.add"; 1609 case SimdOp::I16x8AddSatS: 1610 return "i16x8.add_sat_s"; 1611 case SimdOp::I16x8AddSatU: 1612 return "i16x8.add_sat_u"; 1613 case SimdOp::I16x8Sub: 1614 return "i16x8.sub"; 1615 case SimdOp::I16x8SubSatS: 1616 return "i16x8.sub_sat_s"; 1617 case SimdOp::I16x8SubSatU: 1618 return "i16x8.sub_sat_u"; 1619 case SimdOp::F64x2Nearest: 1620 return "f64x2.nearest"; 1621 case SimdOp::I16x8Mul: 1622 return "i16x8.mul"; 1623 case SimdOp::I16x8MinS: 1624 return "i16x8.min_s"; 1625 case SimdOp::I16x8MinU: 1626 return "i16x8.min_u"; 1627 case SimdOp::I16x8MaxS: 1628 return "i16x8.max_s"; 1629 case SimdOp::I16x8MaxU: 1630 return "i16x8.max_u"; 1631 case SimdOp::I16x8AvgrU: 1632 return "i16x8.avgr_u"; 1633 case SimdOp::I16x8ExtmulLowI8x16S: 1634 return "i16x8.extmul_low_i8x16_s"; 1635 case SimdOp::I16x8ExtmulHighI8x16S: 1636 return "i16x8.extmul_high_i8x16_s"; 1637 case SimdOp::I16x8ExtmulLowI8x16U: 1638 return "i16x8.extmul_low_i8x16_u"; 1639 case SimdOp::I16x8ExtmulHighI8x16U: 1640 return "i16x8.extmul_high_i8x16_u"; 1641 case SimdOp::I32x4Abs: 1642 return "i32x4.abs"; 1643 case SimdOp::I32x4Neg: 1644 return "i32x4.neg"; 1645 case SimdOp::I32x4AllTrue: 1646 return "i32x4.all_true"; 1647 case SimdOp::I32x4Bitmask: 1648 return "i32x4.bitmask"; 1649 case SimdOp::I32x4ExtendLowI16x8S: 1650 return "i32x4.extend_low_i16x8_s"; 1651 case SimdOp::I32x4ExtendHighI16x8S: 1652 return "i32x4.extend_high_i16x8_s"; 1653 case SimdOp::I32x4ExtendLowI16x8U: 1654 return "i32x4.extend_low_i16x8_u"; 1655 case SimdOp::I32x4ExtendHighI16x8U: 1656 return "i32x4.extend_high_i16x8_u"; 1657 case SimdOp::I32x4Shl: 1658 return "i32x4.shl"; 1659 case SimdOp::I32x4ShrS: 1660 return "i32x4.shr_s"; 1661 case SimdOp::I32x4ShrU: 1662 return "i32x4.shr_u"; 1663 case SimdOp::I32x4Add: 1664 return "i32x4.add"; 1665 case SimdOp::I32x4Sub: 1666 return "i32x4.sub"; 1667 case SimdOp::I32x4Mul: 1668 return "i32x4.mul"; 1669 case SimdOp::I32x4MinS: 1670 return "i32x4.min_s"; 1671 case SimdOp::I32x4MinU: 1672 return "i32x4.min_u"; 1673 case SimdOp::I32x4MaxS: 1674 return "i32x4.max_s"; 1675 case SimdOp::I32x4MaxU: 1676 return "i32x4.max_u"; 1677 case SimdOp::I32x4DotI16x8S: 1678 return "i32x4.dot_i16x8_s"; 1679 case SimdOp::I32x4ExtmulLowI16x8S: 1680 return "i32x4.extmul_low_i16x8_s"; 1681 case SimdOp::I32x4ExtmulHighI16x8S: 1682 return "i32x4.extmul_high_i16x8_s"; 1683 case SimdOp::I32x4ExtmulLowI16x8U: 1684 return "i32x4.extmul_low_i16x8_u"; 1685 case SimdOp::I32x4ExtmulHighI16x8U: 1686 return "i32x4.extmul_high_i16x8_u"; 1687 case SimdOp::I64x2Abs: 1688 return "i64x2.abs"; 1689 case SimdOp::I64x2Neg: 1690 return "i64x2.neg"; 1691 case SimdOp::I64x2AllTrue: 1692 return "i64x2.all_true"; 1693 case SimdOp::I64x2Bitmask: 1694 return "i64x2.bitmask"; 1695 case SimdOp::I64x2ExtendLowI32x4S: 1696 return "i64x2.extend_low_i32x4_s"; 1697 case SimdOp::I64x2ExtendHighI32x4S: 1698 return "i64x2.extend_high_i32x4_s"; 1699 case SimdOp::I64x2ExtendLowI32x4U: 1700 return "i64x2.extend_low_i32x4_u"; 1701 case SimdOp::I64x2ExtendHighI32x4U: 1702 return "i64x2.extend_high_i32x4_u"; 1703 case SimdOp::I64x2Shl: 1704 return "i64x2.shl"; 1705 case SimdOp::I64x2ShrS: 1706 return "i64x2.shr_s"; 1707 case SimdOp::I64x2ShrU: 1708 return "i64x2.shr_u"; 1709 case SimdOp::I64x2Add: 1710 return "i64x2.add"; 1711 case SimdOp::I64x2Sub: 1712 return "i64x2.sub"; 1713 case SimdOp::I64x2Mul: 1714 return "i64x2.mul"; 1715 case SimdOp::I64x2Eq: 1716 return "i64x2.eq"; 1717 case SimdOp::I64x2Ne: 1718 return "i64x2.ne"; 1719 case SimdOp::I64x2LtS: 1720 return "i64x2.lt_s"; 1721 case SimdOp::I64x2GtS: 1722 return "i64x2.gt_s"; 1723 case SimdOp::I64x2LeS: 1724 return "i64x2.le_s"; 1725 case SimdOp::I64x2GeS: 1726 return "i64x2.ge_s"; 1727 case SimdOp::I64x2ExtmulLowI32x4S: 1728 return "i64x2.extmul_low_i32x4_s"; 1729 case SimdOp::I64x2ExtmulHighI32x4S: 1730 return "i64x2.extmul_high_i32x4_s"; 1731 case SimdOp::I64x2ExtmulLowI32x4U: 1732 return "i64x2.extmul_low_i32x4_u"; 1733 case SimdOp::I64x2ExtmulHighI32x4U: 1734 return "i64x2.extmul_high_i32x4_u"; 1735 case SimdOp::F32x4Abs: 1736 return "f32x4.abs"; 1737 case SimdOp::F32x4Neg: 1738 return "f32x4.neg"; 1739 case SimdOp::F32x4Sqrt: 1740 return "f32x4.sqrt"; 1741 case SimdOp::F32x4Add: 1742 return "f32x4.add"; 1743 case SimdOp::F32x4Sub: 1744 return "f32x4.sub"; 1745 case SimdOp::F32x4Mul: 1746 return "f32x4.mul"; 1747 case SimdOp::F32x4Div: 1748 return "f32x4.div"; 1749 case SimdOp::F32x4Min: 1750 return "f32x4.min"; 1751 case SimdOp::F32x4Max: 1752 return "f32x4.max"; 1753 case SimdOp::F32x4PMin: 1754 return "f32x4.pmin"; 1755 case SimdOp::F32x4PMax: 1756 return "f32x4.pmax"; 1757 case SimdOp::F64x2Abs: 1758 return "f64x2.abs"; 1759 case SimdOp::F64x2Neg: 1760 return "f64x2.neg"; 1761 case SimdOp::F64x2Sqrt: 1762 return "f64x2.sqrt"; 1763 case SimdOp::F64x2Add: 1764 return "f64x2.add"; 1765 case SimdOp::F64x2Sub: 1766 return "f64x2.sub"; 1767 case SimdOp::F64x2Mul: 1768 return "f64x2.mul"; 1769 case SimdOp::F64x2Div: 1770 return "f64x2.div"; 1771 case SimdOp::F64x2Min: 1772 return "f64x2.min"; 1773 case SimdOp::F64x2Max: 1774 return "f64x2.max"; 1775 case SimdOp::F64x2PMin: 1776 return "f64x2.pmin"; 1777 case SimdOp::F64x2PMax: 1778 return "f64x2.pmax"; 1779 case SimdOp::I32x4TruncSatF32x4S: 1780 return "i32x4.trunc_sat_f32x4_s"; 1781 case SimdOp::I32x4TruncSatF32x4U: 1782 return "i32x4.trunc_sat_f32x4_u"; 1783 case SimdOp::F32x4ConvertI32x4S: 1784 return "f32x4.convert_i32x4_s"; 1785 case SimdOp::F32x4ConvertI32x4U: 1786 return "f32x4.convert_i32x4_u"; 1787 case SimdOp::I32x4TruncSatF64x2SZero: 1788 return "i32x4.trunc_sat_f64x2_s_zero"; 1789 case SimdOp::I32x4TruncSatF64x2UZero: 1790 return "i32x4.trunc_sat_f64x2_u_zero"; 1791 case SimdOp::F64x2ConvertLowI32x4S: 1792 return "f64x2.convert_low_i32x4_s"; 1793 case SimdOp::F64x2ConvertLowI32x4U: 1794 return "f64x2.convert_low_i32x4_u"; 1795 case SimdOp::I8x16RelaxedSwizzle: 1796 return "i8x16.relaxed_swizzle"; 1797 case SimdOp::I32x4RelaxedTruncF32x4S: 1798 return "i32x4.relaxed_trunc_f32x4_s"; 1799 case SimdOp::I32x4RelaxedTruncF32x4U: 1800 return "i32x4.relaxed_trunc_f32x4_u"; 1801 case SimdOp::I32x4RelaxedTruncF64x2SZero: 1802 return "i32x4.relaxed_trunc_f64x2_s_zero"; 1803 case SimdOp::I32x4RelaxedTruncF64x2UZero: 1804 return "i32x4.relaxed_trunc_f64x2_u_zero"; 1805 case SimdOp::F32x4RelaxedMadd: 1806 return "f32x4.relaxed_madd"; 1807 case SimdOp::F32x4RelaxedNmadd: 1808 return "f32x4.relaxed_nmadd"; 1809 case SimdOp::F64x2RelaxedMadd: 1810 return "f64x2.relaxed_madd"; 1811 case SimdOp::F64x2RelaxedNmadd: 1812 return "f64x2.relaxed_nmadd"; 1813 case SimdOp::I8x16RelaxedLaneSelect: 1814 return "i8x16.relaxed_laneselect"; 1815 case SimdOp::I16x8RelaxedLaneSelect: 1816 return "i16x8.relaxed_laneselect"; 1817 case SimdOp::I32x4RelaxedLaneSelect: 1818 return "i32x4.relaxed_laneselect"; 1819 case SimdOp::I64x2RelaxedLaneSelect: 1820 return "i64x2.relaxed_laneselect"; 1821 case SimdOp::F32x4RelaxedMin: 1822 return "f32x4.relaxed_min"; 1823 case SimdOp::F32x4RelaxedMax: 1824 return "f32x4.relaxed_max"; 1825 case SimdOp::F64x2RelaxedMin: 1826 return "f64x2.relaxed_min"; 1827 case SimdOp::F64x2RelaxedMax: 1828 return "f64x2.relaxed_max"; 1829 case SimdOp::I16x8RelaxedQ15MulrS: 1830 return "i16x8.relaxed_q15mulr_s"; 1831 case SimdOp::I16x8RelaxedDotI8x16I7x16S: 1832 return "i16x8.relaxed_dot_i8x16_i7x16_s"; 1833 case SimdOp::I32x4RelaxedDotI8x16I7x16AddS: 1834 return "i32x4.relaxed_dot_i8x16_i7x16_add_s"; 1835 default: 1836 return "unknown"; 1837 } 1838 } 1839 case Op::ThreadPrefix: { 1840 switch (ThreadOp(b1)) { 1841 case ThreadOp::Notify: 1842 return "memory.atomic.notify"; 1843 case ThreadOp::I32Wait: 1844 return "memory.atomic.wait32"; 1845 case ThreadOp::I64Wait: 1846 return "memory.atomic.wait64"; 1847 case ThreadOp::Fence: 1848 return "atomic.fence"; 1849 case ThreadOp::I32AtomicLoad: 1850 return "i32.atomic.load"; 1851 case ThreadOp::I64AtomicLoad: 1852 return "i64.atomic.load"; 1853 case ThreadOp::I32AtomicLoad8U: 1854 return "i32.atomic.load8u"; 1855 case ThreadOp::I32AtomicLoad16U: 1856 return "i32.atomic.load16_u"; 1857 case ThreadOp::I64AtomicLoad8U: 1858 return "i64.atomic.load8u"; 1859 case ThreadOp::I64AtomicLoad16U: 1860 return "i64.atomic.load16_u"; 1861 case ThreadOp::I64AtomicLoad32U: 1862 return "i64.atomic.load32_u"; 1863 case ThreadOp::I32AtomicStore: 1864 return "i32.atomic.store"; 1865 case ThreadOp::I64AtomicStore: 1866 return "i64.atomic.store"; 1867 case ThreadOp::I32AtomicStore8U: 1868 return "i32.atomic.store8_u"; 1869 case ThreadOp::I32AtomicStore16U: 1870 return "i32.atomic.store16_u"; 1871 case ThreadOp::I64AtomicStore8U: 1872 return "i64.atomic.store8_u"; 1873 case ThreadOp::I64AtomicStore16U: 1874 return "i64.atomic.store16_u"; 1875 case ThreadOp::I64AtomicStore32U: 1876 return "i64.atomic.store32_u"; 1877 case ThreadOp::I32AtomicAdd: 1878 return "i32.atomic.rmw.add"; 1879 case ThreadOp::I64AtomicAdd: 1880 return "i64.atomic.rmw.add"; 1881 case ThreadOp::I32AtomicAdd8U: 1882 return "i32.atomic.rmw8.add_u"; 1883 case ThreadOp::I32AtomicAdd16U: 1884 return "i32.atomic.rmw16.add_u"; 1885 case ThreadOp::I64AtomicAdd8U: 1886 return "i64.atomic.rmw8.add_u"; 1887 case ThreadOp::I64AtomicAdd16U: 1888 return "i64.atomic.rmw16.add_u"; 1889 case ThreadOp::I64AtomicAdd32U: 1890 return "i64.atomic.rmw32.add_u"; 1891 case ThreadOp::I32AtomicSub: 1892 return "i32.atomic.rmw.sub"; 1893 case ThreadOp::I64AtomicSub: 1894 return "i64.atomic.rmw.sub"; 1895 case ThreadOp::I32AtomicSub8U: 1896 return "i32.atomic.rmw8.sub_u"; 1897 case ThreadOp::I32AtomicSub16U: 1898 return "i32.atomic.rmw16.sub_u"; 1899 case ThreadOp::I64AtomicSub8U: 1900 return "i64.atomic.rmw8.sub_u"; 1901 case ThreadOp::I64AtomicSub16U: 1902 return "i64.atomic.rmw16.sub_u"; 1903 case ThreadOp::I64AtomicSub32U: 1904 return "i64.atomic.rmw32.sub_u"; 1905 case ThreadOp::I32AtomicAnd: 1906 return "i32.atomic.rmw.and"; 1907 case ThreadOp::I64AtomicAnd: 1908 return "i64.atomic.rmw.and"; 1909 case ThreadOp::I32AtomicAnd8U: 1910 return "i32.atomic.rmw.and8_u"; 1911 case ThreadOp::I32AtomicAnd16U: 1912 return "i32.atomic.rmw16.and_u"; 1913 case ThreadOp::I64AtomicAnd8U: 1914 return "i64.atomic.rmw8.and_u"; 1915 case ThreadOp::I64AtomicAnd16U: 1916 return "i64.atomic.rmw16.and_u"; 1917 case ThreadOp::I64AtomicAnd32U: 1918 return "i64.atomic.rmw32.and_u"; 1919 case ThreadOp::I32AtomicOr: 1920 return "i32.atomic.rmw.or"; 1921 case ThreadOp::I64AtomicOr: 1922 return "i64.atomic.rmw.or"; 1923 case ThreadOp::I32AtomicOr8U: 1924 return "i32.atomic.rmw8.or_u"; 1925 case ThreadOp::I32AtomicOr16U: 1926 return "i32.atomic.rmw16.or_u"; 1927 case ThreadOp::I64AtomicOr8U: 1928 return "i64.atomic.rmw8.or_u"; 1929 case ThreadOp::I64AtomicOr16U: 1930 return "i64.atomic.rmw16.or_u"; 1931 case ThreadOp::I64AtomicOr32U: 1932 return "i64.atomic.rmw32.or_u"; 1933 case ThreadOp::I32AtomicXor: 1934 return "i32.atomic.rmw.xor"; 1935 case ThreadOp::I64AtomicXor: 1936 return "i64.atomic.rmw.xor"; 1937 case ThreadOp::I32AtomicXor8U: 1938 return "i32.atomic.rmw8.xor_u"; 1939 case ThreadOp::I32AtomicXor16U: 1940 return "i32.atomic.rmw16.xor_u"; 1941 case ThreadOp::I64AtomicXor8U: 1942 return "i64.atomic.rmw8.xor_u"; 1943 case ThreadOp::I64AtomicXor16U: 1944 return "i64.atomic.rmw16.xor_u"; 1945 case ThreadOp::I64AtomicXor32U: 1946 return "i64.atomic.rmw32.xor_u"; 1947 case ThreadOp::I32AtomicXchg: 1948 return "i32.atomic.rmw.xchg"; 1949 case ThreadOp::I64AtomicXchg: 1950 return "i64.atomic.rmw.xchg"; 1951 case ThreadOp::I32AtomicXchg8U: 1952 return "i32.atomic.rmw8.xchg_u"; 1953 case ThreadOp::I32AtomicXchg16U: 1954 return "i32.atomic.rmw16.xchg_u"; 1955 case ThreadOp::I64AtomicXchg8U: 1956 return "i64.atomic.rmw8.xchg_u"; 1957 case ThreadOp::I64AtomicXchg16U: 1958 return "i64.atomic.rmw16.xchg_u"; 1959 case ThreadOp::I64AtomicXchg32U: 1960 return "i64.atomic.rmw32.xchg_u"; 1961 case ThreadOp::I32AtomicCmpXchg: 1962 return "i32.atomic.rmw.cmpxchg"; 1963 case ThreadOp::I64AtomicCmpXchg: 1964 return "i64.atomic.rmw.cmpxchg"; 1965 case ThreadOp::I32AtomicCmpXchg8U: 1966 return "i32.atomic.rmw8.cmpxchg_u"; 1967 case ThreadOp::I32AtomicCmpXchg16U: 1968 return "i32.atomic.rmw16.cmpxchg_u"; 1969 case ThreadOp::I64AtomicCmpXchg8U: 1970 return "i64.atomic.rmw8.cmpxchg_u"; 1971 case ThreadOp::I64AtomicCmpXchg16U: 1972 return "i64.atomic.rmw16.cmpxchg_u"; 1973 case ThreadOp::I64AtomicCmpXchg32U: 1974 return "i64.atomic.rmw32.cmpxchg_u"; 1975 default: 1976 return "unknown"; 1977 } 1978 } 1979 default: 1980 return "unknown"; 1981 } 1982 } 1983 1984 bool UnsetLocalsState::init(const ValTypeVector& locals, size_t numParams) { 1985 MOZ_ASSERT(setLocalsStack_.empty()); 1986 1987 // Find the first and total count of non-defaultable locals. 1988 size_t firstNonDefaultable = UINT32_MAX; 1989 size_t countNonDefaultable = 0; 1990 for (size_t i = numParams; i < locals.length(); i++) { 1991 if (!locals[i].isDefaultable()) { 1992 firstNonDefaultable = std::min(i, firstNonDefaultable); 1993 countNonDefaultable++; 1994 } 1995 } 1996 firstNonDefaultLocal_ = firstNonDefaultable; 1997 if (countNonDefaultable == 0) { 1998 // No locals to track, saving CPU cycles. 1999 MOZ_ASSERT(firstNonDefaultable == UINT32_MAX); 2000 return true; 2001 } 2002 2003 // setLocalsStack_ cannot be deeper than amount of non-defaultable locals. 2004 if (!setLocalsStack_.reserve(countNonDefaultable)) { 2005 return false; 2006 } 2007 2008 // Allocate a bitmap for locals starting at the first non-defaultable local. 2009 size_t bitmapSize = 2010 ((locals.length() - firstNonDefaultable) + (WordBits - 1)) / WordBits; 2011 if (!unsetLocals_.resize(bitmapSize)) { 2012 return false; 2013 } 2014 memset(unsetLocals_.begin(), 0, bitmapSize * WordSize); 2015 for (size_t i = firstNonDefaultable; i < locals.length(); i++) { 2016 if (!locals[i].isDefaultable()) { 2017 size_t localUnsetIndex = i - firstNonDefaultable; 2018 unsetLocals_[localUnsetIndex / WordBits] |= 2019 1 << (localUnsetIndex % WordBits); 2020 } 2021 } 2022 return true; 2023 }