tor-browser

The Tor Browser
git clone https://git.dasho.dev/tor-browser.git
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extension-riscv-b.h (2838B)

      1 // Copyright 2022 the V8 project authors. All rights reserved.
      2 // Use of this source code is governed by a BSD-style license that can be
      3 // found in the LICENSE file.
      4 
      5 #ifndef jit_riscv64_extension_Extension_riscv_b_h_
      6 #define jit_riscv64_extension_Extension_riscv_b_h_
      7 
      8 #include <stdint.h>
      9 
     10 #include "jit/riscv64/extension/base-assembler-riscv.h"
     11 #include "jit/riscv64/Register-riscv64.h"
     12 
     13 namespace js {
     14 namespace jit {
     15 class AssemblerRISCVB : public AssemblerRiscvBase {
     16  // RV32B Extension
     17 public:
     18  // Zba Extension
     19  void sh1add(Register rd, Register rs1, Register rs2);
     20  void sh2add(Register rd, Register rs1, Register rs2);
     21  void sh3add(Register rd, Register rs1, Register rs2);
     22 #ifdef JS_CODEGEN_RISCV64
     23  void add_uw(Register rd, Register rs1, Register rs2);
     24  void zext_w(Register rd, Register rs1) { add_uw(rd, rs1, zero_reg); }
     25  void sh1add_uw(Register rd, Register rs1, Register rs2);
     26  void sh2add_uw(Register rd, Register rs1, Register rs2);
     27  void sh3add_uw(Register rd, Register rs1, Register rs2);
     28  void slli_uw(Register rd, Register rs1, uint8_t shamt);
     29 #endif
     30 
     31  // Zbb Extension
     32  void andn(Register rd, Register rs1, Register rs2);
     33  void orn(Register rd, Register rs1, Register rs2);
     34  void xnor(Register rd, Register rs1, Register rs2);
     35 
     36  void clz(Register rd, Register rs);
     37  void ctz(Register rd, Register rs);
     38  void cpop(Register rd, Register rs);
     39 #ifdef JS_CODEGEN_RISCV64
     40  void clzw(Register rd, Register rs);
     41  void ctzw(Register rd, Register rs);
     42  void cpopw(Register rd, Register rs);
     43 #endif
     44 
     45  void max(Register rd, Register rs1, Register rs2);
     46  void maxu(Register rd, Register rs1, Register rs2);
     47  void min(Register rd, Register rs1, Register rs2);
     48  void minu(Register rd, Register rs1, Register rs2);
     49 
     50  void sext_b(Register rd, Register rs);
     51  void sext_h(Register rd, Register rs);
     52  void zext_h(Register rd, Register rs);
     53 
     54  // Zbb: bitwise rotation
     55  void rol(Register rd, Register rs1, Register rs2);
     56  void ror(Register rd, Register rs1, Register rs2);
     57  void rori(Register rd, Register rs1, uint8_t shamt);
     58  void orc_b(Register rd, Register rs);
     59  void rev8(Register rd, Register rs);
     60 #ifdef JS_CODEGEN_RISCV64
     61  void rolw(Register rd, Register rs1, Register rs2);
     62  void roriw(Register rd, Register rs1, uint8_t shamt);
     63  void rorw(Register rd, Register rs1, Register rs2);
     64 #endif
     65 
     66  // Zbs
     67  void bclr(Register rd, Register rs1, Register rs2);
     68  void bclri(Register rd, Register rs1, uint8_t shamt);
     69  void bext(Register rd, Register rs1, Register rs2);
     70  void bexti(Register rd, Register rs1, uint8_t shamt);
     71  void binv(Register rd, Register rs1, Register rs2);
     72  void binvi(Register rd, Register rs1, uint8_t shamt);
     73  void bset(Register rd, Register rs1, Register rs2);
     74  void bseti(Register rd, Register rs1, uint8_t shamt);
     75 };
     76 }  // namespace jit
     77 }  // namespace js
     78 #endif