extension-riscv-a.h (2306B)
1 // Copyright 2022 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file." 4 #ifndef jit_riscv64_extension_Extension_riscv_a_h_ 5 #define jit_riscv64_extension_Extension_riscv_a_h_ 6 7 #include "jit/riscv64/extension/base-assembler-riscv.h" 8 #include "jit/riscv64/Register-riscv64.h" 9 namespace js { 10 namespace jit { 11 class AssemblerRISCVA : public AssemblerRiscvBase { 12 // RV32A Standard Extension 13 public: 14 void lr_w(bool aq, bool rl, Register rd, Register rs1); 15 void sc_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 16 void amoswap_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 17 void amoadd_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 18 void amoxor_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 19 void amoand_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 20 void amoor_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 21 void amomin_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 22 void amomax_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 23 void amominu_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 24 void amomaxu_w(bool aq, bool rl, Register rd, Register rs1, Register rs2); 25 26 #ifdef JS_CODEGEN_RISCV64 27 // RV64A Standard Extension (in addition to RV32A) 28 void lr_d(bool aq, bool rl, Register rd, Register rs1); 29 void sc_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 30 void amoswap_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 31 void amoadd_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 32 void amoxor_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 33 void amoand_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 34 void amoor_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 35 void amomin_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 36 void amomax_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 37 void amominu_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 38 void amomaxu_d(bool aq, bool rl, Register rd, Register rs1, Register rs2); 39 #endif 40 }; 41 } // namespace jit 42 } // namespace js 43 #endif // jit_riscv64_extension_Extension_riscv_A_h_