Base-constant-riscv.cpp (6594B)
1 // Copyright 2021 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 #include "jit/riscv64/constant/Base-constant-riscv.h" 5 6 #include "mozilla/Assertions.h" 7 8 #include "jit/riscv64/constant/Constant-riscv-c.h" 9 #include "jit/riscv64/constant/Constant-riscv-d.h" 10 #include "jit/riscv64/constant/Constant-riscv-f.h" 11 #include "jit/riscv64/constant/Constant-riscv-i.h" 12 #include "jit/riscv64/constant/Constant-riscv-m.h" 13 #include "jit/riscv64/constant/Constant-riscv-v.h" 14 #include "jit/riscv64/constant/Constant-riscv-zicsr.h" 15 #include "jit/riscv64/constant/Constant-riscv-zifencei.h" 16 #include "jit/riscv64/Simulator-riscv64.h" 17 namespace js { 18 namespace jit { 19 20 int32_t ImmBranchMaxForwardOffset(OffsetSize bits) { 21 return (1 << (bits - 1)) - 1; 22 } 23 24 bool InstructionBase::IsShortInstruction() const { 25 uint8_t FirstByte = *reinterpret_cast<const uint8_t*>(this); 26 return (FirstByte & 0x03) <= C2; 27 } 28 29 template <class T> 30 int InstructionGetters<T>::RvcRdValue() const { 31 MOZ_ASSERT(this->IsShortInstruction()); 32 return this->Bits(kRvcRdShift + kRvcRdBits - 1, kRvcRdShift); 33 } 34 35 template <class T> 36 int InstructionGetters<T>::RvcRs2Value() const { 37 MOZ_ASSERT(this->IsShortInstruction()); 38 return this->Bits(kRvcRs2Shift + kRvcRs2Bits - 1, kRvcRs2Shift); 39 } 40 41 template <class T> 42 int InstructionGetters<T>::RvcRs1sValue() const { 43 MOZ_ASSERT(this->IsShortInstruction()); 44 return 0b1000 + this->Bits(kRvcRs1sShift + kRvcRs1sBits - 1, kRvcRs1sShift); 45 } 46 47 template <class T> 48 int InstructionGetters<T>::RvcRs2sValue() const { 49 MOZ_ASSERT(this->IsShortInstruction()); 50 return 0b1000 + this->Bits(kRvcRs2sShift + kRvcRs2sBits - 1, kRvcRs2sShift); 51 } 52 53 template <class T> 54 inline int InstructionGetters<T>::RvcFunct6Value() const { 55 MOZ_ASSERT(this->IsShortInstruction()); 56 return this->Bits(kRvcFunct6Shift + kRvcFunct6Bits - 1, kRvcFunct6Shift); 57 } 58 59 template <class T> 60 inline int InstructionGetters<T>::RvcFunct4Value() const { 61 MOZ_ASSERT(this->IsShortInstruction()); 62 return this->Bits(kRvcFunct4Shift + kRvcFunct4Bits - 1, kRvcFunct4Shift); 63 } 64 65 template <class T> 66 inline int InstructionGetters<T>::RvcFunct3Value() const { 67 MOZ_ASSERT(this->IsShortInstruction()); 68 return this->Bits(kRvcFunct3Shift + kRvcFunct3Bits - 1, kRvcFunct3Shift); 69 } 70 71 template <class T> 72 inline int InstructionGetters<T>::RvcFunct2Value() const { 73 MOZ_ASSERT(this->IsShortInstruction()); 74 return this->Bits(kRvcFunct2Shift + kRvcFunct2Bits - 1, kRvcFunct2Shift); 75 } 76 77 template <class T> 78 inline int InstructionGetters<T>::RvcFunct2BValue() const { 79 MOZ_ASSERT(this->IsShortInstruction()); 80 return this->Bits(kRvcFunct2BShift + kRvcFunct2Bits - 1, kRvcFunct2BShift); 81 } 82 83 template <class T> 84 uint32_t InstructionGetters<T>::Rvvzimm() const { 85 if ((this->InstructionBits() & 86 (kBaseOpcodeMask | kFunct3Mask | 0x80000000)) == RO_V_VSETVLI) { 87 uint32_t Bits = this->InstructionBits(); 88 uint32_t zimm = Bits & kRvvZimmMask; 89 return zimm >> kRvvZimmShift; 90 } else { 91 MOZ_ASSERT((this->InstructionBits() & 92 (kBaseOpcodeMask | kFunct3Mask | 0xC0000000)) == RO_V_VSETIVLI); 93 uint32_t Bits = this->InstructionBits(); 94 uint32_t zimm = Bits & kRvvZimmMask; 95 return (zimm >> kRvvZimmShift) & 0x3FF; 96 } 97 } 98 99 template <class T> 100 uint32_t InstructionGetters<T>::Rvvuimm() const { 101 MOZ_ASSERT((this->InstructionBits() & 102 (kBaseOpcodeMask | kFunct3Mask | 0xC0000000)) == RO_V_VSETIVLI); 103 uint32_t Bits = this->InstructionBits(); 104 uint32_t uimm = Bits & kRvvUimmMask; 105 return uimm >> kRvvUimmShift; 106 } 107 108 template class InstructionGetters<InstructionBase>; 109 #ifdef JS_SIMULATOR_RISCV64 110 template class InstructionGetters<SimInstructionBase>; 111 #endif 112 113 OffsetSize InstructionBase::GetOffsetSize() const { 114 if (IsIllegalInstruction()) { 115 MOZ_CRASH("IllegalInstruction"); 116 } 117 if (IsShortInstruction()) { 118 switch (InstructionBits() & kRvcOpcodeMask) { 119 case RO_C_J: 120 return kOffset11; 121 case RO_C_BEQZ: 122 case RO_C_BNEZ: 123 return kOffset9; 124 default: 125 MOZ_CRASH("IllegalInstruction"); 126 } 127 } else { 128 switch (InstructionBits() & kBaseOpcodeMask) { 129 case BRANCH: 130 return kOffset13; 131 case JAL: 132 return kOffset21; 133 default: 134 MOZ_CRASH("IllegalInstruction"); 135 } 136 } 137 } 138 139 InstructionBase::Type InstructionBase::InstructionType() const { 140 if (IsIllegalInstruction()) { 141 return kUnsupported; 142 } 143 // RV64C Instruction 144 if (IsShortInstruction()) { 145 switch (InstructionBits() & kRvcOpcodeMask) { 146 case RO_C_ADDI4SPN: 147 return kCIWType; 148 case RO_C_FLD: 149 case RO_C_LW: 150 #ifdef JS_CODEGEN_RISCV64 151 case RO_C_LD: 152 #endif 153 return kCLType; 154 case RO_C_FSD: 155 case RO_C_SW: 156 #ifdef JS_CODEGEN_RISCV64 157 case RO_C_SD: 158 #endif 159 return kCSType; 160 case RO_C_NOP_ADDI: 161 case RO_C_LI: 162 #ifdef JS_CODEGEN_RISCV64 163 case RO_C_ADDIW: 164 #endif 165 case RO_C_LUI_ADD: 166 return kCIType; 167 case RO_C_MISC_ALU: 168 if (Bits(11, 10) != 0b11) 169 return kCBType; 170 else 171 return kCAType; 172 case RO_C_J: 173 return kCJType; 174 case RO_C_BEQZ: 175 case RO_C_BNEZ: 176 return kCBType; 177 case RO_C_SLLI: 178 case RO_C_FLDSP: 179 case RO_C_LWSP: 180 #ifdef JS_CODEGEN_RISCV64 181 case RO_C_LDSP: 182 #endif 183 return kCIType; 184 case RO_C_JR_MV_ADD: 185 return kCRType; 186 case RO_C_FSDSP: 187 case RO_C_SWSP: 188 #ifdef JS_CODEGEN_RISCV64 189 case RO_C_SDSP: 190 #endif 191 return kCSSType; 192 default: 193 break; 194 } 195 } else { 196 // RISCV routine 197 switch (InstructionBits() & kBaseOpcodeMask) { 198 case LOAD: 199 return kIType; 200 case LOAD_FP: 201 return kIType; 202 case MISC_MEM: 203 return kIType; 204 case OP_IMM: 205 return kIType; 206 case AUIPC: 207 return kUType; 208 case OP_IMM_32: 209 return kIType; 210 case STORE: 211 return kSType; 212 case STORE_FP: 213 return kSType; 214 case AMO: 215 return kRType; 216 case OP: 217 return kRType; 218 case LUI: 219 return kUType; 220 case OP_32: 221 return kRType; 222 case MADD: 223 case MSUB: 224 case NMSUB: 225 case NMADD: 226 return kR4Type; 227 case OP_FP: 228 return kRType; 229 case BRANCH: 230 return kBType; 231 case JALR: 232 return kIType; 233 case JAL: 234 return kJType; 235 case SYSTEM: 236 return kIType; 237 case OP_V: 238 return kVType; 239 } 240 } 241 return kUnsupported; 242 } 243 } // namespace jit 244 } // namespace js