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The Tor Browser
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SharedICHelpers-riscv64.h (2560B)


      1 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
      2 * vim: set ts=8 sts=2 et sw=2 tw=80:
      3 * This Source Code Form is subject to the terms of the Mozilla Public
      4 * License, v. 2.0. If a copy of the MPL was not distributed with this
      5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
      6 
      7 #ifndef jit_riscv64_SharedICHelpers_riscv64_h
      8 #define jit_riscv64_SharedICHelpers_riscv64_h
      9 #include "jit/BaselineIC.h"
     10 #include "jit/JitFrames.h"
     11 #include "jit/MacroAssembler.h"
     12 #include "jit/SharedICRegisters.h"
     13 namespace js {
     14 namespace jit {
     15 
     16 static const size_t ICStackValueOffset = 0;
     17 
     18 inline void EmitRestoreTailCallReg(MacroAssembler& masm) {
     19  // No-op on RISC-V because ra register is always holding the return address.
     20 }
     21 
     22 inline void EmitRepushTailCallReg(MacroAssembler& masm) {
     23  // No-op on RISC-V because ra register is always holding the return address.
     24 }
     25 inline void EmitCallIC(MacroAssembler& masm, CodeOffset* callOffset) {
     26  // The stub pointer must already be in ICStubReg.
     27  // Load stubcode pointer from the ICStub.
     28  // R2 won't be active when we call ICs, so we can use it as scratch.
     29  masm.loadPtr(Address(ICStubReg, ICStub::offsetOfStubCode()), R2.scratchReg());
     30 
     31  // Call the stubcode via a direct jump-and-link
     32  *callOffset = masm.call(R2.scratchReg());
     33 }
     34 inline void EmitReturnFromIC(MacroAssembler& masm) { masm.branch(ra); }
     35 inline void EmitBaselineLeaveStubFrame(MacroAssembler& masm) {
     36  masm.loadPtr(
     37      Address(FramePointer, BaselineStubFrameLayout::ICStubOffsetFromFP),
     38      ICStubReg);
     39 
     40  masm.movePtr(FramePointer, StackPointer);
     41  masm.Pop(FramePointer);
     42 
     43  // Load the return address.
     44  masm.Pop(ICTailCallReg);
     45 
     46  // Discard the frame descriptor.
     47  {
     48    UseScratchRegisterScope temps(&masm);
     49    Register scratch2 = temps.Acquire();
     50    masm.Pop(scratch2);
     51  }
     52 }
     53 
     54 inline void EmitStubGuardFailure(MacroAssembler& masm) {
     55  // Load next stub into ICStubReg
     56  masm.loadPtr(Address(ICStubReg, ICCacheIRStub::offsetOfNext()), ICStubReg);
     57 
     58  // Return address is already loaded, just jump to the next stubcode.
     59  MOZ_ASSERT(ICTailCallReg == ra);
     60  masm.jump(Address(ICStubReg, ICStub::offsetOfStubCode()));
     61 }
     62 template <typename AddrType>
     63 inline void EmitPreBarrier(MacroAssembler& masm, const AddrType& addr,
     64                           MIRType type) {
     65  // On RISC-V, $ra is clobbered by guardedCallPreBarrier. Save it first.
     66  masm.push(ra);
     67  masm.guardedCallPreBarrier(addr, type);
     68  masm.pop(ra);
     69 }
     70 
     71 }  // namespace jit
     72 }  // namespace js
     73 
     74 #endif /* jit_riscv64_SharedICHelpers_riscv64_h */