tor-browser

The Tor Browser
git clone https://git.dasho.dev/tor-browser.git
Log | Files | Refs | README | LICENSE

MoveEmitter-riscv64.h (2506B)

      1 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
      2 * vim: set ts=8 sts=2 et sw=2 tw=80:
      3 * This Source Code Form is subject to the terms of the Mozilla Public
      4 * License, v. 2.0. If a copy of the MPL was not distributed with this
      5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
      6 
      7 #ifndef jit_riscv64_MoveEmitter_riscv64_h
      8 #define jit_riscv64_MoveEmitter_riscv64_h
      9 
     10 #include "mozilla/Assertions.h"
     11 #include "jit/MacroAssembler.h"
     12 #include "jit/riscv64/Architecture-riscv64.h"
     13 namespace js {
     14 namespace jit {
     15 
     16 class MacroAssemblerRiscv64;
     17 class MoveResolver;
     18 struct Register;
     19 
     20 class MoveEmitterRiscv64 {
     21  uint32_t inCycle_;
     22  MacroAssembler& masm;
     23 
     24  // Original stack push value.
     25  uint32_t pushedAtStart_;
     26 
     27  // These store stack offsets to spill locations, snapshotting
     28  // codegen->framePushed_ at the time they were allocated. They are -1 if no
     29  // stack space has been allocated for that particular spill.
     30  int32_t pushedAtCycle_;
     31 
     32  // These are registers that are available for temporary use. They may be
     33  // assigned InvalidReg. If no corresponding spill space has been assigned,
     34  // then these registers do not need to be spilled.
     35  Register spilledReg_;
     36  FloatRegister spilledFloatReg_;
     37 
     38 public:
     39  explicit MoveEmitterRiscv64(MacroAssembler& m)
     40      : inCycle_(0),
     41        masm(m),
     42        pushedAtStart_(masm.framePushed()),
     43        pushedAtCycle_(-1),
     44        spilledReg_(InvalidReg),
     45        spilledFloatReg_(InvalidFloatReg) {}
     46  void emit(const MoveResolver&);
     47  void emit(const MoveOp& move);
     48  void emitMove(const MoveOperand& from, const MoveOperand& to);
     49  void emitInt32Move(const MoveOperand& from, const MoveOperand& to);
     50  void emitFloat32Move(const MoveOperand& from, const MoveOperand& to);
     51  void emitDoubleMove(const MoveOperand& from, const MoveOperand& to);
     52  void finish();
     53  void assertDone();
     54  void setScratchRegister(Register) { MOZ_CRASH("Unimplement on riscv"); }
     55  Address cycleSlot(uint32_t slot, uint32_t subslot = 0) const;
     56  int32_t getAdjustedOffset(const MoveOperand& operand);
     57  Address getAdjustedAddress(const MoveOperand& operand);
     58 
     59  void breakCycle(const MoveOperand& from, const MoveOperand& to,
     60                  MoveOp::Type type, uint32_t slotId);
     61  void completeCycle(const MoveOperand& from, const MoveOperand& to,
     62                     MoveOp::Type type, uint32_t slot);
     63 };
     64 
     65 typedef MoveEmitterRiscv64 MoveEmitter;
     66 
     67 }  // namespace jit
     68 }  // namespace js
     69 
     70 #endif /* jit_riscv64_MoveEmitter_riscv64_h */