Lowering-arm64.h (4932B)
1 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- 2 * vim: set ts=8 sts=2 et sw=2 tw=80: 3 * This Source Code Form is subject to the terms of the Mozilla Public 4 * License, v. 2.0. If a copy of the MPL was not distributed with this 5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ 6 7 #ifndef jit_arm64_Lowering_arm64_h 8 #define jit_arm64_Lowering_arm64_h 9 10 #include "jit/shared/Lowering-shared.h" 11 12 namespace js { 13 namespace jit { 14 15 class LIRGeneratorARM64 : public LIRGeneratorShared { 16 protected: 17 LIRGeneratorARM64(MIRGenerator* gen, MIRGraph& graph, LIRGraph& lirGraph) 18 : LIRGeneratorShared(gen, graph, lirGraph) {} 19 20 // Returns a box allocation. reg2 is ignored on 64-bit platforms. 21 LBoxAllocation useBoxFixed(MDefinition* mir, Register reg1, Register reg2, 22 bool useAtStart = false); 23 24 LAllocation useByteOpRegister(MDefinition* mir); 25 LAllocation useByteOpRegisterAtStart(MDefinition* mir); 26 LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition* mir); 27 LDefinition tempByteOpRegister(); 28 29 LDefinition tempToUnbox(); 30 31 bool needTempForPostBarrier() { return true; } 32 33 // ARM64 has a scratch register, so no need for another temp for dispatch ICs. 34 LDefinition tempForDispatchCache(MIRType outputType = MIRType::None) { 35 return LDefinition::BogusTemp(); 36 } 37 38 void lowerUntypedPhiInput(MPhi* phi, uint32_t inputPosition, LBlock* block, 39 size_t lirIndex); 40 void lowerInt64PhiInput(MPhi* phi, uint32_t inputPosition, LBlock* block, 41 size_t lirIndex) { 42 lowerTypedPhiInput(phi, inputPosition, block, lirIndex); 43 } 44 void defineInt64Phi(MPhi* phi, size_t lirIndex) { 45 defineTypedPhi(phi, lirIndex); 46 } 47 void lowerForShift(LInstructionHelper<1, 2, 0>* ins, MDefinition* mir, 48 MDefinition* lhs, MDefinition* rhs); 49 void lowerUrshD(MUrsh* mir); 50 51 void lowerPowOfTwoI(MPow* mir); 52 53 void lowerForALU(LInstructionHelper<1, 1, 0>* ins, MDefinition* mir, 54 MDefinition* input); 55 void lowerForALU(LInstructionHelper<1, 2, 0>* ins, MDefinition* mir, 56 MDefinition* lhs, MDefinition* rhs); 57 58 void lowerForALUInt64(LInstructionHelper<INT64_PIECES, INT64_PIECES, 0>* ins, 59 MDefinition* mir, MDefinition* input); 60 void lowerForALUInt64( 61 LInstructionHelper<INT64_PIECES, 2 * INT64_PIECES, 0>* ins, 62 MDefinition* mir, MDefinition* lhs, MDefinition* rhs); 63 void lowerForMulInt64(LMulI64* ins, MMul* mir, MDefinition* lhs, 64 MDefinition* rhs); 65 template <class LInstr> 66 void lowerForShiftInt64(LInstr* ins, MDefinition* mir, MDefinition* lhs, 67 MDefinition* rhs); 68 69 void lowerForFPU(LInstructionHelper<1, 1, 0>* ins, MDefinition* mir, 70 MDefinition* input); 71 72 void lowerForFPU(LInstructionHelper<1, 2, 0>* ins, MDefinition* mir, 73 MDefinition* lhs, MDefinition* rhs); 74 75 void lowerBuiltinInt64ToFloatingPoint(MBuiltinInt64ToFloatingPoint* ins); 76 void lowerWasmBuiltinTruncateToInt64(MWasmBuiltinTruncateToInt64* ins); 77 void lowerWasmBuiltinTruncateToInt32(MWasmBuiltinTruncateToInt32* ins); 78 void lowerTruncateDToInt32(MTruncateToInt32* ins); 79 void lowerTruncateFToInt32(MTruncateToInt32* ins); 80 void lowerDivI(MDiv* div); 81 void lowerModI(MMod* mod); 82 void lowerDivI64(MDiv* div); 83 void lowerWasmBuiltinDivI64(MWasmBuiltinDivI64* div); 84 void lowerModI64(MMod* mod); 85 void lowerWasmBuiltinModI64(MWasmBuiltinModI64* mod); 86 void lowerUDivI64(MDiv* div); 87 void lowerUModI64(MMod* mod); 88 void lowerMulI(MMul* mul, MDefinition* lhs, MDefinition* rhs); 89 void lowerUDiv(MDiv* div); 90 void lowerUMod(MMod* mod); 91 void lowerWasmSelectI(MWasmSelect* select); 92 void lowerWasmSelectI64(MWasmSelect* select); 93 bool canSpecializeWasmCompareAndSelect(MCompare::CompareType compTy, 94 MIRType insTy); 95 void lowerWasmCompareAndSelect(MWasmSelect* ins, MDefinition* lhs, 96 MDefinition* rhs, MCompare::CompareType compTy, 97 JSOp jsop); 98 99 void lowerBigIntPtrLsh(MBigIntPtrLsh* ins); 100 void lowerBigIntPtrRsh(MBigIntPtrRsh* ins); 101 void lowerBigIntPtrDiv(MBigIntPtrDiv* ins); 102 void lowerBigIntPtrMod(MBigIntPtrMod* ins); 103 104 void lowerAtomicLoad64(MLoadUnboxedScalar* ins); 105 void lowerAtomicStore64(MStoreUnboxedScalar* ins); 106 107 #ifdef ENABLE_WASM_SIMD 108 bool canFoldReduceSimd128AndBranch(wasm::SimdOp op); 109 bool canEmitWasmReduceSimd128AtUses(MWasmReduceSimd128* ins); 110 #endif 111 112 LTableSwitchV* newLTableSwitchV(const LBoxAllocation& in); 113 LTableSwitch* newLTableSwitch(const LAllocation& in, 114 const LDefinition& inputCopy); 115 116 void lowerPhi(MPhi* phi); 117 }; 118 119 using LIRGeneratorSpecific = LIRGeneratorARM64; 120 121 } // namespace jit 122 } // namespace js 123 124 #endif /* jit_arm64_Lowering_arm64_h */