shuffle-x86-ion-codegen.js (3002B)
1 // |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration("x64") || getBuildConfiguration("simulator") || isAvxPresent(); include:codegen-x64-test.js 2 3 // Test that there are no extraneous moves or fixups for SIMD shuffle 4 // operations. See README-codegen.md for general information about this type of 5 // test case. 6 7 codegenTestX64_v128xv128_v128([ 8 // Identity op on first argument should generate no code 9 ['i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15', 10 ''], 11 12 // Identity op on second argument should generate a move 13 ['i8x16.shuffle 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31', 14 `movdqa %xmm1, %xmm0`], 15 16 // Broadcast a byte from first argument 17 ['i8x16.shuffle 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5', 18 ` 19 punpcklbw %xmm0, %xmm0 20 pshufhw \\$0x55, %xmm0, %xmm0 21 pshufd \\$0xAA, %xmm0, %xmm0`], 22 23 // Broadcast a word from first argument 24 ['i8x16.shuffle 4 5 4 5 4 5 4 5 4 5 4 5 4 5 4 5', 25 ` 26 pshuflw \\$0xAA, %xmm0, %xmm0 27 pshufd \\$0x00, %xmm0, %xmm0`], 28 29 // Permute bytes 30 ['i8x16.shuffle 2 1 4 3 6 5 8 7 10 9 12 11 14 13 0 15', 31 ` 32 pshufbx ${RIPR}, %xmm0`], 33 34 // Permute words 35 ['i8x16.shuffle 2 3 0 1 6 7 4 5 10 11 8 9 14 15 12 13', 36 ` 37 pshuflw \\$0xB1, %xmm0, %xmm0 38 pshufhw \\$0xB1, %xmm0, %xmm0`], 39 40 // Permute doublewords 41 ['i8x16.shuffle 4 5 6 7 0 1 2 3 12 13 14 15 8 9 10 11', 42 `pshufd \\$0xB1, %xmm0, %xmm0`], 43 44 // Rotate right 45 ['i8x16.shuffle 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12', 46 `palignr \\$0x0D, %xmm0, %xmm0`], 47 48 // General shuffle + blend. The initial movdqa to scratch is unavoidable 49 // unless we can convince the compiler that it's OK to destroy xmm1. 50 ['i8x16.shuffle 15 29 0 1 2 1 2 0 3 4 7 8 16 8 17 9', 51 ` 52 movdqa %xmm1, %xmm15 53 pshufbx ${RIPR}, %xmm15 54 pshufbx ${RIPR}, %xmm0 55 por %xmm15, %xmm0`]]); 56 57 codegenTestX64_v128xLITERAL_v128( 58 [// Shift left bytes, shifting in zeroes 59 // 60 // Remember the low-order bytes are at the "right" end 61 // 62 // The pxor is a code generation bug: the operand is unused, and no 63 // code should need to be generated for it, and no register should 64 // be allocated to it. The lowering does not use that operand, but 65 // code generation still touches it. 66 ['i8x16.shuffle 16 16 16 0 1 2 3 4 5 6 7 8 9 10 11 12', 67 '(v128.const i32x4 0 0 0 0)', 68 ` 69 pslldq \\$0x03, %xmm0`], 70 71 // Shift right bytes, shifting in zeroes. See above. 72 ['i8x16.shuffle 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18', 73 '(v128.const i32x4 0 0 0 0)', 74 ` 75 psrldq \\$0x03, %xmm0`]]); 76 77 // SSE4.1 PBLENDVB instruction is using XMM0, checking if blend 78 // operation generated as expected. 79 codegenTestX64_adhoc( 80 `(func (export "f") (param v128 v128 v128 v128) (result v128) 81 (i8x16.shuffle 0 17 2 3 4 5 6 7 24 25 26 11 12 13 30 15 82 (local.get 2)(local.get 3)))`, 83 'f', 84 ` 85 movdqa %xmm2, %xmm1 86 movdqax ${RIPR}, %xmm0 87 pblendvb %xmm3, %xmm1 88 movdqa %xmm1, %xmm0`);