bitselect-x64-ion-codegen.js (1711B)
1 // |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration("x64") || getBuildConfiguration("simulator") || isAvxPresent(); include:codegen-x64-test.js 2 3 // Test that there are no extraneous moves or fixups for SIMD bitselect 4 // operations. See README-codegen.md for general information about this type of 5 // test case. 6 7 // The codegen enforces onTrue == output so we avoid a move to set that up. 8 // 9 // The remaining movdqa is currently unavoidable, it moves the control mask into a temp. 10 // The temp should be identical to the mask but the regalloc does not currently 11 // allow this constraint to be enforced. 12 13 // Inputs (xmm0, xmm1, xmm2) 14 15 codegenTestX64_adhoc( 16 `(module 17 (func (export "f") (param v128) (param v128) (param v128) (param v128) (result v128) 18 (v128.bitselect (local.get 0) (local.get 1) (local.get 2))))`, 19 'f', 20 `movdqa %xmm2, %xmm3 21 pand %xmm3, %xmm0 22 pandn %xmm1, %xmm3 23 por %xmm3, %xmm0`); 24 25 // Blend constant optimizations 26 27 codegenTestX64_adhoc( 28 `(module 29 (func (export "f") (param v128) (param v128) (param v128) (result v128) 30 (v128.bitselect (local.get 0) (local.get 1) (v128.const i32x4 -1 0 0 -1))))`, 31 'f', 32 `pblendw \\$0x3C, %xmm1, %xmm0`); 33 34 // vpblendvp optimization when bitselect follows comparison. 35 // Non-AVX pblendvb uses xmm0 as an implicit read-only operand. 36 codegenTestX64_adhoc( 37 `(module 38 (func (export "f") (param v128) (param v128) (param v128) (param v128) (result v128) 39 (v128.bitselect (local.get 2) (local.get 3) 40 (i32x4.eq (local.get 0) (local.get 1)))))`, 41 'f', ` 42 pcmpeqd %xmm1, %xmm0 43 movdqa %xmm3, %xmm1 44 pblendvb %xmm2, %xmm1 45 movdqa %xmm1, %xmm0`);