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binop-x64-ion-codegen.js (10770B)

      1 // |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration("x64") || getBuildConfiguration("simulator"); include:codegen-x64-test.js
      2 
      3 // Test that there are no extraneous moves or fixups for sundry SIMD binary
      4 // operations.  See README-codegen.md for general information about this type of
      5 // test case.
      6 
      7 // Inputs (xmm0, xmm1)
      8 
      9 codegenTestX64_v128xPTYPE_v128(
     10    [['f32x4.replace_lane 0', 'f32', `movss %xmm1, %xmm0`],
     11     ['f32x4.replace_lane 1', 'f32', `insertps \\$0x10, %xmm1, %xmm0`],
     12     ['f32x4.replace_lane 3', 'f32', `insertps \\$0x30, %xmm1, %xmm0`],
     13     ['f64x2.replace_lane 0', 'f64', `movsd %xmm1, %xmm0`],
     14     ['f64x2.replace_lane 1', 'f64', `shufpd \\$0x00, %xmm1, %xmm0`]] );
     15 
     16 // Inputs (xmm1, xmm0)
     17 
     18 codegenTestX64_v128xv128_v128_reversed(
     19    [['f32x4.pmin', `minps %xmm1, %xmm0`],
     20     ['f32x4.pmax', `maxps %xmm1, %xmm0`],
     21     ['f64x2.pmin', `minpd %xmm1, %xmm0`],
     22     ['f64x2.pmax', `maxpd %xmm1, %xmm0`]] );
     23 
     24 // Constant arguments that are folded into the instruction
     25 
     26 codegenTestX64_v128xLITERAL_v128(
     27    [['i8x16.add', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     28      `paddbx ${RIPR}, %xmm0`],
     29     ['i8x16.sub', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     30      `psubbx ${RIPR}, %xmm0`],
     31     ['i8x16.add_sat_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     32      `paddsbx ${RIPR}, %xmm0`],
     33     ['i8x16.add_sat_u', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     34      `paddusbx ${RIPR}, %xmm0`],
     35     ['i8x16.sub_sat_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     36      `psubsbx ${RIPR}, %xmm0`],
     37     ['i8x16.sub_sat_u', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     38      `psubusbx ${RIPR}, %xmm0`],
     39     ['i8x16.min_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     40      `pminsbx ${RIPR}, %xmm0`],
     41     ['i8x16.min_u', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     42      `pminubx ${RIPR}, %xmm0`],
     43     ['i8x16.max_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     44      `pmaxsbx ${RIPR}, %xmm0`],
     45     ['i8x16.max_u', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     46      `pmaxubx ${RIPR}, %xmm0`],
     47     ['i8x16.eq', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     48      `pcmpeqbx ${RIPR}, %xmm0`],
     49     ['i8x16.ne', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)', `
     50 pcmpeqbx ${RIPR}, %xmm0
     51 pcmpeqw %xmm15, %xmm15
     52 pxor %xmm15, %xmm0`],
     53     ['i8x16.gt_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     54      `pcmpgtbx ${RIPR}, %xmm0`],
     55     ['i8x16.le_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)', `
     56 pcmpgtbx ${RIPR}, %xmm0
     57 pcmpeqw %xmm15, %xmm15
     58 pxor %xmm15, %xmm0`],
     59     ['i8x16.narrow_i16x8_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     60      `packsswbx ${RIPR}, %xmm0`],
     61     ['i8x16.narrow_i16x8_u', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
     62      `packuswbx ${RIPR}, %xmm0`],
     63 
     64     ['i16x8.add', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     65      `paddwx ${RIPR}, %xmm0`],
     66     ['i16x8.sub', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     67      `psubwx ${RIPR}, %xmm0`],
     68     ['i16x8.mul', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     69      `pmullwx ${RIPR}, %xmm0`],
     70     ['i16x8.add_sat_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     71      `paddswx ${RIPR}, %xmm0`],
     72     ['i16x8.add_sat_u', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     73      `padduswx ${RIPR}, %xmm0`],
     74     ['i16x8.sub_sat_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     75      `psubswx ${RIPR}, %xmm0`],
     76     ['i16x8.sub_sat_u', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     77      `psubuswx ${RIPR}, %xmm0`],
     78     ['i16x8.min_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     79      `pminswx ${RIPR}, %xmm0`],
     80     ['i16x8.min_u', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     81      `pminuwx ${RIPR}, %xmm0`],
     82     ['i16x8.max_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     83      `pmaxswx ${RIPR}, %xmm0`],
     84     ['i16x8.max_u', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     85      `pmaxuwx ${RIPR}, %xmm0`],
     86     ['i16x8.eq', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     87      `pcmpeqwx ${RIPR}, %xmm0`],
     88     ['i16x8.ne', '(v128.const i16x8 1 2 1 2 1 2 1 2)', `
     89 pcmpeqwx ${RIPR}, %xmm0
     90 pcmpeqw %xmm15, %xmm15
     91 pxor %xmm15, %xmm0`],
     92     ['i16x8.gt_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     93      `pcmpgtwx ${RIPR}, %xmm0`],
     94     ['i16x8.le_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)', `
     95 pcmpgtwx ${RIPR}, %xmm0
     96 pcmpeqw %xmm15, %xmm15
     97 pxor %xmm15, %xmm0`],
     98     ['i16x8.narrow_i32x4_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
     99      `packssdwx ${RIPR}, %xmm0`],
    100     ['i16x8.narrow_i32x4_u', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    101      `packusdwx ${RIPR}, %xmm0`],
    102 
    103     ['i32x4.add', '(v128.const i32x4 1 2 1 2)',
    104      `padddx ${RIPR}, %xmm0`],
    105     ['i32x4.sub', '(v128.const i32x4 1 2 1 2)',
    106      `psubdx ${RIPR}, %xmm0`],
    107     ['i32x4.mul', '(v128.const i32x4 1 2 1 2)',
    108      `pmulldx ${RIPR}, %xmm0`],
    109     ['i32x4.min_s', '(v128.const i32x4 1 2 1 2)',
    110      `pminsdx ${RIPR}, %xmm0`],
    111     ['i32x4.min_u', '(v128.const i32x4 1 2 1 2)',
    112      `pminudx ${RIPR}, %xmm0`],
    113     ['i32x4.max_s', '(v128.const i32x4 1 2 1 2)',
    114      `pmaxsdx ${RIPR}, %xmm0`],
    115     ['i32x4.max_u', '(v128.const i32x4 1 2 1 2)',
    116      `pmaxudx ${RIPR}, %xmm0`],
    117     ['i32x4.eq', '(v128.const i32x4 1 2 1 2)',
    118      `pcmpeqdx ${RIPR}, %xmm0`],
    119     ['i32x4.ne', '(v128.const i32x4 1 2 1 2)', `
    120 pcmpeqdx ${RIPR}, %xmm0
    121 pcmpeqw %xmm15, %xmm15
    122 pxor %xmm15, %xmm0`],
    123     ['i32x4.gt_s', '(v128.const i32x4 1 2 1 2)',
    124      `pcmpgtdx ${RIPR}, %xmm0`],
    125     ['i32x4.le_s', '(v128.const i32x4 1 2 1 2)', `
    126 pcmpgtdx ${RIPR}, %xmm0
    127 pcmpeqw %xmm15, %xmm15
    128 pxor %xmm15, %xmm0`],
    129     ['i32x4.dot_i16x8_s', '(v128.const i32x4 1 2 1 2)',
    130      `pmaddwdx ${RIPR}, %xmm0`],
    131 
    132     ['i64x2.add', '(v128.const i64x2 1 2)',
    133      `paddqx ${RIPR}, %xmm0`],
    134     ['i64x2.sub', '(v128.const i64x2 1 2)',
    135      `psubqx ${RIPR}, %xmm0`],
    136 
    137     ['v128.and', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    138      `pandx ${RIPR}, %xmm0`],
    139     ['v128.or', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    140      `porx ${RIPR}, %xmm0`],
    141     ['v128.xor', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    142      `pxorx ${RIPR}, %xmm0`],
    143 
    144     ['f32x4.add', '(v128.const f32x4 1 2 3 4)',
    145      `addpsx ${RIPR}, %xmm0`],
    146     ['f32x4.sub', '(v128.const f32x4 1 2 3 4)',
    147      `subpsx ${RIPR}, %xmm0`],
    148     ['f32x4.mul', '(v128.const f32x4 1 2 3 4)',
    149      `mulpsx ${RIPR}, %xmm0`],
    150     ['f32x4.div', '(v128.const f32x4 1 2 3 4)',
    151      `divpsx ${RIPR}, %xmm0`],
    152     ['f32x4.eq', '(v128.const f32x4 1 2 3 4)',
    153      `cmppsx \\$0x00, ${RIPR}, %xmm0`],
    154     ['f32x4.ne', '(v128.const f32x4 1 2 3 4)',
    155      `cmppsx \\$0x04, ${RIPR}, %xmm0`],
    156     ['f32x4.lt', '(v128.const f32x4 1 2 3 4)',
    157      `cmppsx \\$0x01, ${RIPR}, %xmm0`],
    158     ['f32x4.le', '(v128.const f32x4 1 2 3 4)',
    159      `cmppsx \\$0x02, ${RIPR}, %xmm0`],
    160 
    161     ['f64x2.add', '(v128.const f64x2 1 2)',
    162      `addpdx ${RIPR}, %xmm0`],
    163     ['f64x2.sub', '(v128.const f64x2 1 2)',
    164      `subpdx ${RIPR}, %xmm0`],
    165     ['f64x2.mul', '(v128.const f64x2 1 2)',
    166      `mulpdx ${RIPR}, %xmm0`],
    167     ['f64x2.div', '(v128.const f64x2 1 2)',
    168      `divpdx ${RIPR}, %xmm0`],
    169     ['f64x2.eq', '(v128.const f64x2 1 2)',
    170      `cmppdx \\$0x00, ${RIPR}, %xmm0`],
    171     ['f64x2.ne', '(v128.const f64x2 1 2)',
    172      `cmppdx \\$0x04, ${RIPR}, %xmm0`],
    173     ['f64x2.lt', '(v128.const f64x2 1 2)',
    174      `cmppdx \\$0x01, ${RIPR}, %xmm0`],
    175     ['f64x2.le', '(v128.const f64x2 1 2)',
    176      `cmppdx \\$0x02, ${RIPR}, %xmm0`]]);
    177 
    178 // Commutative operations with constants on the lhs should generate the same
    179 // code as with the constant on the rhs.
    180 
    181 codegenTestX64_LITERALxv128_v128(
    182    [['i8x16.add', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    183      `paddbx ${RIPR}, %xmm0`],
    184     ['i8x16.add_sat_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    185      `paddsbx ${RIPR}, %xmm0`],
    186     ['i8x16.add_sat_u', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    187      `paddusbx ${RIPR}, %xmm0`],
    188     ['i8x16.min_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    189      `pminsbx ${RIPR}, %xmm0`],
    190     ['i8x16.min_u', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    191      `pminubx ${RIPR}, %xmm0`],
    192     ['i8x16.max_s', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    193      `pmaxsbx ${RIPR}, %xmm0`],
    194     ['i8x16.max_u', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    195      `pmaxubx ${RIPR}, %xmm0`],
    196     ['i8x16.eq', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    197      `pcmpeqbx ${RIPR}, %xmm0`],
    198     ['i8x16.ne', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)', `
    199 pcmpeqbx ${RIPR}, %xmm0
    200 pcmpeqw %xmm15, %xmm15
    201 pxor %xmm15, %xmm0`],
    202 
    203     ['i16x8.add', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    204      `paddwx ${RIPR}, %xmm0`],
    205     ['i16x8.mul', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    206      `pmullwx ${RIPR}, %xmm0`],
    207     ['i16x8.add_sat_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    208      `paddswx ${RIPR}, %xmm0`],
    209     ['i16x8.add_sat_u', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    210      `padduswx ${RIPR}, %xmm0`],
    211     ['i16x8.min_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    212      `pminswx ${RIPR}, %xmm0`],
    213     ['i16x8.min_u', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    214      `pminuwx ${RIPR}, %xmm0`],
    215     ['i16x8.max_s', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    216      `pmaxswx ${RIPR}, %xmm0`],
    217     ['i16x8.max_u', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    218      `pmaxuwx ${RIPR}, %xmm0`],
    219     ['i16x8.eq', '(v128.const i16x8 1 2 1 2 1 2 1 2)',
    220      `pcmpeqwx ${RIPR}, %xmm0`],
    221     ['i16x8.ne', '(v128.const i16x8 1 2 1 2 1 2 1 2)', `
    222 pcmpeqwx ${RIPR}, %xmm0
    223 pcmpeqw %xmm15, %xmm15
    224 pxor %xmm15, %xmm0`],
    225 
    226     ['i32x4.add', '(v128.const i32x4 1 2 1 2)',
    227      `padddx ${RIPR}, %xmm0`],
    228     ['i32x4.mul', '(v128.const i32x4 1 2 1 2)',
    229      `pmulldx ${RIPR}, %xmm0`],
    230     ['i32x4.min_s', '(v128.const i32x4 1 2 1 2)',
    231      `pminsdx ${RIPR}, %xmm0`],
    232     ['i32x4.min_u', '(v128.const i32x4 1 2 1 2)',
    233      `pminudx ${RIPR}, %xmm0`],
    234     ['i32x4.max_s', '(v128.const i32x4 1 2 1 2)',
    235      `pmaxsdx ${RIPR}, %xmm0`],
    236     ['i32x4.max_u', '(v128.const i32x4 1 2 1 2)',
    237      `pmaxudx ${RIPR}, %xmm0`],
    238     ['i32x4.eq', '(v128.const i32x4 1 2 1 2)',
    239      `pcmpeqdx ${RIPR}, %xmm0`],
    240     ['i32x4.ne', '(v128.const i32x4 1 2 1 2)', `
    241 pcmpeqdx ${RIPR}, %xmm0
    242 pcmpeqw %xmm15, %xmm15
    243 pxor %xmm15, %xmm0`],
    244     ['i32x4.dot_i16x8_s', '(v128.const i32x4 1 2 1 2)',
    245      `pmaddwdx ${RIPR}, %xmm0`],
    246 
    247     ['i64x2.add', '(v128.const i64x2 1 2)',
    248      `paddqx ${RIPR}, %xmm0`],
    249 
    250     ['v128.and', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    251      `pandx ${RIPR}, %xmm0`],
    252     ['v128.or', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    253      `porx ${RIPR}, %xmm0`],
    254     ['v128.xor', '(v128.const i8x16 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2)',
    255      `pxorx ${RIPR}, %xmm0`]]);